公开(公告)号：US09779833B2

公开(公告)日：2017-10-03

申请号：US15291676

申请日：2016-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hyun Joo ,  Jae-Woo Im

IPC: G11C11/34 ,  G11C16/34 ,  G11C16/10

CPC classification number: G11C16/3495 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3459

Abstract: A method of programming a flash memory device, which is a nonvolatile memory device including a plurality of pages, includes executing an Nth program loop of a program operation by applying an Nth selected program voltage to a selected word line from among the plurality of pages, and performing a program verify operation by applying a program verify voltage to the selected word line, counting the number of memory cells having a threshold voltage which is greater than or equal to the program verify voltage, from among memory cells connected to the selected word line, generating a program voltage revision value based on a result of the counting and an operational condition of the Nth program loop, and adding the program voltage revision value to an Mth preset program voltage of an Mth program loop executed after the Nth program loop where M>N.

公开(公告)号：US09747997B2

公开(公告)日：2017-08-29

申请号：US15292417

申请日：2016-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun Lee ,  Sang-Hyun Joo

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C16/08 ,  G11C16/26 ,  G11C16/16

CPC classification number: G11C16/3495 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/3459 ,  G11C29/021 ,  G11C29/028 ,  G11C29/12005 ,  G11C29/26 ,  G11C29/50004 ,  G11C2029/0409 ,  G11C2029/1202 ,  G11C2029/1204

Abstract: A method of operating a non-volatile memory device includes selecting a first select transistor from among a plurality of select transistors included in a NAND string, and performing a check operation on a first threshold voltage of the first select transistor. The check operation includes comparing the first threshold voltage with a first lower-limit reference voltage level, and performing a program operation on the first select transistor when the first threshold voltage is lower than the first lower-limit reference voltage level. When the first threshold voltage is equal to or higher than the first lower-limit reference voltage level, the check operation on the first threshold voltage is ended.

公开(公告)号：US08958251B2

公开(公告)日：2015-02-17

申请号：US13913710

申请日：2013-06-10

Applicant: Samsung Electronics Co., Ltd

Inventor： Ohsuk Kwon ,  Sang-Hyun Joo ,  HyeongJun Kim ,  Kitae Park ,  Seung-Hwan Shin

IPC: G11C16/06 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C16/24 ,  G11C16/3459

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit connected with the memory cell array via a plurality of bit lines and configured to selectively pre-charge the plurality of bit lines, and control logic configured to control the page buffer circuit such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a first time at a read operation and such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a second time different from the first time at a verification read operation. The second time is determined on the basis of the number of selected bit lines of the plurality of bit lines at the verification read operation.

Abstract translation: 非易失性存储器件包括包括多个存储器单元的存储单元阵列，经由多个位线与存储单元阵列连接并被配置为选择性地预充电多个位线的页缓冲器电路，以及配置为 控制页面缓冲器电路，使得在读取操作的第一时间期间将预充电电压施加到多个位线的选定位线，并且使得预充电电压被施加到多个位线中的选定位线 在第二时间不同于在验证读取操作的第一时间的位线。 基于在验证读取操作中的多个位线的选定位线的数量来确定第二次。