公开(公告)号：US20060075137A1

公开(公告)日：2006-04-06

申请号：US10528978

申请日：2003-09-29

申请人： Hajime Maekawa ,  Shinji Hamai ,  Hidetoshi Mitsushio ,  Hidetoshi Takeda ,  Tadashi Kunihira ,  Yoshihiro Oka

发明人： Hajime Maekawa ,  Shinji Hamai ,  Hidetoshi Mitsushio ,  Hidetoshi Takeda ,  Tadashi Kunihira ,  Yoshihiro Oka

IPC分类号： G06F15/16

CPC分类号： H04L29/12339 ,  H04L29/12301 ,  H04L29/12509 ,  H04L61/2076 ,  H04L61/2503 ,  H04L61/2567 ,  H04L63/12 ,  H04L63/166

摘要： A system includes electronic equipment, an information processing device and a server device. The electronic equipment sends first address change confirmation information containing first address information to the information processing device. The information processing device sends second address change confirmation information obtained by writing second address information in the received first address change confirmation information. The server device determines that the first address information and the second address information, which are contained in the received second address change confirmation information, agree with each other, and updates the address information to new one when the first address information and the second address information do not agree with each other. With such a system, electronic equipment can hold up-to-date address information of the information processing device with extremely light processing at the side of the server device and with small load of communication.

摘要翻译： 系统包括电子设备，信息处理设备和服务器设备。 电子设备向信息处理设备发送包含第一地址信息的第一地址改变确认信息。 信息处理装置发送通过在所接收的第一地址改变确认信息中写入第二地址信息而获得的第二地址改变确认信息。 服务器装置确定包含在所接收的第二地址改变确认信息中的第一地址信息和第二地址信息彼此一致，并且当第一地址信息和第二地址信息 不同意。 利用这样的系统，电子设备可以在服务器设备侧具有极轻的处理能力并且以较小的通信负载来保持信息处理设备的最新地址信息。

公开(公告)号：US6122280A

公开(公告)日：2000-09-19

申请号：US692710

申请日：1996-08-06

申请人： Shinji Hamai ,  Hidetoshi Takeda ,  Makoto Asano

发明人： Shinji Hamai ,  Hidetoshi Takeda ,  Makoto Asano

IPC分类号： H04L29/08 ,  H04L12/40 ,  H04L12/64 ,  H04L12/70 ,  H04L12/841 ,  H04L12/951 ,  H04L12/955 ,  H04N7/24 ,  H04J3/24

CPC分类号： H04L12/40058 ,  H04L12/40071 ,  H04L47/10 ,  H04N21/43632

摘要： A packet output device for formatting serial data into packets and for transmitting resulting data packets includes a data packet generator for generating each data packet and for generating time data corresponding to the data packet, the time data defining an output time of the data packet, and a packet transmitting circuit for receiving the data packet and the corresponding time data and transmitting the data packet based on the corresponding time data.

摘要翻译： 用于将串行数据格式化为分组并用于发送结果数据分组的分组输出设备包括：数据分组生成器，用于生成每个数据分组并生成对应于数据分组的时间数据，定义数据分组的输出时间的时间数据;以及 分组发送电路，用于接收数据分组和对应的时间数据，并根据对应的时间数据发送数据分组。

公开(公告)号：US6118930A

公开(公告)日：2000-09-12

申请号：US5484

申请日：1998-01-12

申请人： Shinji Hamai ,  Masao Okabe ,  Yasunori Kawakami

发明人： Shinji Hamai ,  Masao Okabe ,  Yasunori Kawakami

IPC分类号： G11B5/008 ,  G11B5/09 ,  G11B5/592 ,  G11B15/46 ,  G11B20/10 ,  G11B20/14 ,  H04N5/926 ,  H04N5/917 ,  H04N7/26

CPC分类号： G11B20/1426 ,  G11B15/463 ,  G11B20/10009 ,  G11B5/0086 ,  G11B5/09 ,  G11B2020/10537 ,  G11B5/5921

摘要： When modulating by an interleaved NRZI technique by inserting one bit per every m bits of input data series, the frequency characteristics of bit rows varying by the polarity ("0" or "1") of the bit to be inserted are compared, and the bit row closer to the desired frequency characteristic is selected as the output series, so that recording is effected by controlling the frequency characteristics of the digital signal.

摘要翻译： 当通过插入的NRZI技术通过每输入数据串的每m位插入一位进行调制时，比较要被插入的位的极性（“0”或“1”）变化的位行的频率特性，并且 选择靠近期望频率特性的位行作为输出序列，从而通过控制数字信号的频率特性来进行记录。

公开(公告)号：US6031959A

公开(公告)日：2000-02-29

申请号：US766644

申请日：1996-12-13

申请人： Shinji Hamai ,  Masazumi Yamada ,  Tatsuro Juri ,  Masakazu Nishino ,  Shiro Kato ,  Akira Iketani ,  Chiyoko Matsumi

发明人： Shinji Hamai ,  Masazumi Yamada ,  Tatsuro Juri ,  Masakazu Nishino ,  Shiro Kato ,  Akira Iketani ,  Chiyoko Matsumi

IPC分类号： H04N5/7826 ,  H04N5/783 ,  H04N5/926 ,  H04N5/945 ,  H04N9/804 ,  H04N9/82 ,  H04N9/888 ,  H04N5/76

CPC分类号： H04N5/783 ,  H04N5/9264 ,  H04N5/945 ,  H04N5/78263 ,  H04N9/8042 ,  H04N9/8227 ,  H04N9/888

摘要： The video signal input is converted to high-speed reproduction data by a high-speed reproduction data encoder 1. The video signal input is converted to high-speed reproduction data by a formatter 2, which formats the high-speed reproduction data so that the same data is recorded to n tracks. After the recorded data is input to an error correction encoder 3, it is decoded by a decoder 4 and recorded by a recording head 5 to the magnetic tape 6. During reproduction, the recorded data is reproduced by reproduction head 7 from the magnetic tape 6, and decoded by decoder 8. The decoded data is then error corrected by an error correction decoder 9, and then input to a deformatter 10. The deformatter 10 separates the normal reproduction data from the high-speed reproduction data, and separately outputs both data types. During normal reproduction, the normal reproduction data is output by a switch 13; the high-speed reproduction data is decoded to video data by a high-speed reproduction data decoder during high speed reproduction, and output.

摘要翻译： 视频信号输入通过高速再现数据编码器1转换为高速再现数据。格式化器2将视频信号输入转换成高速再现数据，格式化器将格式化高速再现数据，使得 相同的数据被记录到n个轨道。 在将记录数据输入到纠错编码器3之后，由解码器4解码并由记录头5记录到磁带6.在再现期间，记录数据由再生磁头7从磁带6再现 并由解码器8解码。解码数据然后由纠错解码器9进行纠错，然后输入到去格子化器10.去格式化器10将正常再现数据与高速再现数据分开，并且分别输出两个数据 类型。 在正常再现期间，正常再现数据由开关13输出; 在高速再现期间，高速再现数据被高速再现数据解码器解码为视频数据并被输出。

公开(公告)号：US5825567A

公开(公告)日：1998-10-20

申请号：US674870

申请日：1996-07-02

申请人： Shinji Hamai ,  Masao Okabe ,  Yasunori Kawakami

发明人： Shinji Hamai ,  Masao Okabe ,  Yasunori Kawakami

IPC分类号： G11B5/008 ,  G11B5/09 ,  G11B5/592 ,  G11B15/46 ,  G11B20/10 ,  G11B20/14

CPC分类号： G11B20/1426 ,  G11B15/463 ,  G11B20/10009 ,  G11B5/0086 ,  G11B5/09 ,  G11B2020/10537 ,  G11B5/5921

摘要： When modulating by an interleaved NRZI technique by inserting one bit per every m bits of input data series, the frequency characteristics of bit rows varying by the polarity ("0" or "1") of the bit to be inserted are compared, and the bit row closer to the desired frequency characteristic is selected as the output series, so that recording is effected by controlling the frequency characteristics of the digital signal.

摘要翻译： 当通过插入的NRZI技术通过每输入数据串的每m位插入一位进行调制时，比较要被插入的位的极性（“0”或“1”）变化的位行的频率特性，并且 选择靠近期望频率特性的位行作为输出序列，从而通过控制数字信号的频率特性来进行记录。

公开(公告)号：US5638227A

公开(公告)日：1997-06-10

申请号：US356907

申请日：1994-12-15

申请人： Shinji Hamai ,  Chiyoko Matsumi ,  Akira Iketani

发明人： Shinji Hamai ,  Chiyoko Matsumi ,  Akira Iketani

IPC分类号： G11B20/10 ,  G11B20/18 ,  G11B5/09

CPC分类号： G11B20/10009 ,  G11B20/1809

摘要： Input digital data are formatted into a data block composed of a predetermined amount of data, subjected to error correction encoding process, and recorded on a predetermined number of continuous tracks of a recording medium. In the error correction encoding process, the data block is subjected to an inter-track error correction encoding, an outer error correction encoding and an inner error correction encoding. In the inter-track error correction encoding, each information element to be coded is produced by symbols collected from the data which are to be recorded on different tracks of the continuous tracks. The error correction encoded data in the data block are distributed to a first predetermined recording area of each track of the continuous tracks, and parity code words produced by the inter-track error correction encoding are distributed to a second predetermined recording area of each track of the continuous tracks.

摘要翻译： 输入数字数据被格式化为由经过纠错编码处理的预定数量的数据组成的数据块，并记录在预定数量的记录介质的连续轨道上。 在纠错编码处理中，对数据块进行轨道间纠错编码，外部纠错编码和内部纠错编码。 在轨道间纠错编码中，要从要记录在连续轨道的不同轨道上的数据收集的符号产生要被编码的每个信息元素。 数据块中的纠错编码数据被分配到连续轨道的每个轨道的第一预定记录区域，并且由轨道间纠错编码产生的奇偶校验码字被分配到每个轨道的第二预定记录区域 连续轨道。