公开(公告)号：US11838636B2

公开(公告)日：2023-12-05

申请号：US17253558

申请日：2019-07-08

Applicant: SOUTHEAST UNIVERSITY

Inventor： Jun Yang ,  Xiangyang Liu ,  Jianliang Mao ,  Shihua Li

IPC: H04N23/695 ,  G05B11/32 ,  G05B11/42 ,  G05B13/02

CPC classification number: H04N23/695 ,  G05B11/32 ,  G05B11/42 ,  G05B13/027

Abstract: The present invention provides a generalized proportional integral observer-based method for compensating for visual-measurement time lag of an electro-optical tracking system. For visual-measurement time lag present in an electro-optical tracking system, an improved generalized proportional integral observer-based feedback control method is used to mitigate the impact of the measurement time lag on the system and suppress kinematic uncertainty of the system. The core of the method lies in that an observer is used to estimate a state, uncertainty, and a difference of the system at a previous moment, a state and uncertainty of the system at a current moment are then calculated by using these estimated values and a state-space model of the system, and a control input of the system is finally acquired according to the estimated values of the state and uncertainty of the system at the current moment. The method mitigates the adverse impact of visual-measurement time lag on the system and enhances the uncertainty suppression and the tracking precision of the system.

公开(公告)号：US11175686B2

公开(公告)日：2021-11-16

申请号：US16966476

申请日：2020-04-30

Applicant: SOUTHEAST UNIVERSITY

Inventor： Chao Chen ,  Jun Yang ,  Xinning Liu

IPC: G05F1/567 ,  G05F1/575 ,  G05F1/59

Abstract: A low-temperature drift ultra-low-power linear regulator includes eight PMOS transistors, two resistors, two capacitors and three NMOS transistors. The eight PMOS transistors include PMOS transistor PM1 to PMOS transistor PM8. The two resistors include resistor R1 and resistor R2. The two capacitors include capacitor C1 and capacitor C2. The three NMOS transistors include NMOS transistor NM1, NMOS transistor NM2 and NMOS transistor NM3. From right to left, the linear regulator includes a PTAT voltage core starting circuit, a PTAT voltage core circuit, a negative temperature characteristic generating circuit and a driver stage closed-loop control circuit. PM5-PM8 form a feedback circuit. The feedback circuit clamps the current flowing through PM6 to be proportional to PM2 to obtain a temperature-stable output voltage, and can dynamically adjust the gate voltage of PM5 according to the change of load current to output different currents according to the load demand.

公开(公告)号：US10422883B2

公开(公告)日：2019-09-24

申请号：US16309939

申请日：2016-06-27

Applicant: Southeast University

Inventor： Yuan Zhuang ,  Jinfeng Ma ,  Longning Qi ,  Xinning Liu ,  Jun Yang

IPC: G01S19/40 ,  G01S19/42 ,  G01S19/37

Abstract: A positioning method using height-constraint-based extended Kalman filter, suitable for a GNSS navigation and positioning system, comprises: obtaining an estimated state value of a current epoch by using an extended Kalman filter algorithm and according to an estimated state value of a previous epoch; constraining a positioning height of the current epoch by establishing a height constraint condition, so as to obtain an optimum estimated value of the current epoch and a corresponding mean square error, wherein the optimum estimated value satisfies the height constraint condition; further correcting the estimated state value by using a pseudorange obtained from the mean square error and a measured Doppler shift residual to obtain a final estimated state value of the current epoch, thus more accurately obtaining positioning information of a target to be positioned in the current epoch and enhancing the accuracy of GNSS navigation and positioning.

公开(公告)号：US20180252528A1

公开(公告)日：2018-09-06

申请号：US15536615

申请日：2015-11-30

Applicant: SOUTHEAST UNIVERSITY

Inventor： Yuan Zhuang ,  Jun Yang ,  Longning Qi

IPC: G01C21/16 ,  G01S5/02 ,  H04W84/06 ,  G01C21/20 ,  H04W4/021

CPC classification number: G01C21/165 ,  G01C21/206 ,  G01S5/02 ,  G01S5/0252 ,  G01S5/0257 ,  H04W4/021 ,  H04W84/06

Abstract: An integration navigation device and method in which wireless signal strength data collecting and processing module obtains first position information of target to be detected; a sensor data collecting and processing module obtains, according to state change information of the target to be detected, second position information of the target to be detected; a data integration module fuses the first position information and the second position information and feeds back the fused result to the wireless signal strength data collecting and processing module and the sensor data collecting and processing module to perform data processing of the next moment.

公开(公告)号：US20150008971A1

公开(公告)日：2015-01-08

申请号：US14369652

申请日：2012-12-27

Applicant: SOUTHEAST UNIVERSITY

Inventor： Na Bai ,  Longxing Shi ,  Jun Yang ,  Xinning Liu ,  Jiafeng Zhu ,  Yue Feng ,  Cai Gong ,  Fei Pan ,  Hong Chang ,  Yifeng Deng ,  Yuan Chen ,  Yingcheng Xia

IPC: H03K3/013 ,  H03K3/012

CPC classification number: H03K3/013 ,  G11C11/417 ,  G11C11/419 ,  H03K3/012

Abstract: Disclosed is a noise current compensation circuit. The circuit is provided with two input and output terminals A and B, and two control terminals CON and CONF. The control terminals control a work mode (work state and pre-charge state) of the compensation circuit. The compensation circuit consists of 7 PMOS transistors and 8 NMOS transistors. In the normal work state, by detecting changes of potential change rate of two signal lines in an original circuit, the noise current compensation circuit automatically enables one end of the original circuit that discharges slowly to discharge a signal more slowly, and enables one end of the original circuit that discharges rapidly to discharge a signal more rapidly, thus eliminating the influence of the noise current on the circuit and providing assistance for correct identification of subsequent circuit signals. The current compensation circuit can be used for an SRAM bit line leakage current compensation circuit, because the existence of a large leakage current on the SRAM bit line leads to the decreasing of a voltage difference between two ends of the bit line, resulting in that a subsequent circuit cannot correctly identify a signal.

Abstract translation: 公开了一种噪声电流补偿电路。 该电路设有两个输入和输出端子A和B，以及两个控制端子CON和CONF。 控制端子控制补偿电路的工作模式（工作状态和预充电状态）。 补偿电路由7个PMOS晶体管和8个NMOS晶体管组成。 在正常工作状态下，通过检测原始电路中两根信号线的电位变化率的变化，噪声电流补偿电路自动使缓慢放电的原电路的一端缓慢放电，使一端 原始电路快速放电以更快地放电信号，从而消除噪声电流对电路的影响，并为后续电路信号的正确识别提供帮助。 电流补偿电路可以用于SRAM位线漏电流补偿电路，因为SRAM位线上存在大的漏电流导致位线两端之间的电压差减小，导致 后续电路无法正确识别信号。