Ultra-low-power speech feature extraction circuit based on non-overlapping framing and serial FFT

    公开(公告)号:US11651766B2

    公开(公告)日:2023-05-16

    申请号:US17181908

    申请日:2021-02-22

    IPC分类号: G10L15/02 G06F17/14 G10L25/24

    摘要: The present invention discloses an ultra-low-power speech feature extraction circuit based on non-overlapping framing and serial fast Fourier transform (FFT), and belongs to the technical field of computation, calculation or counting. The circuit is oriented to the field of intelligence, and is integrally composed of a pre-process module, a windowing module, a Fourier transform module, a Mel filtering module, an adjacent frame merging module, a discrete cosine transform (DCT) module and other modules by optimizing the architecture of a Mel-frequency Cepstral Coefficients (MFCC) algorithm. Large-scale storage caused by framing is avoided in a non-overlapping framing mode, storage contained in the MFCC algorithm is further reduced, and the circuit area and the power consumption are greatly reduced. An FFT algorithm in the feature extraction circuit adopts a serial pipeline mode to process data, makes full use of the characteristics of serial inflow of audio data, and further reduces the storage area and operations of the circuit.

    Gallium nitride power device and manufacturing method thereof

    公开(公告)号:US11515395B2

    公开(公告)日:2022-11-29

    申请号:US17624336

    申请日:2020-09-25

    摘要: A gallium nitride power device, including: a gallium nitride substrate; cathodes; a plurality of gallium nitride protruding structures arranged on the gallium nitride substrate and between the cathodes, a groove is formed between adjacent gallium nitride protruding structures; an electron transport layer, covering a top portion and side surfaces of each of the gallium nitride protruding structures; a gallium nitride layer, arranged on the electron transport layer and filling each of the grooves; a plurality of second conductivity type regions, where each of the second conductivity type regions extends downward from a top portion of the gallium nitride layer into one of the grooves, and the top portion of each of the gallium nitride protruding structures is higher than a bottom portion of each of the second conductivity type regions; and an anode, arranged on the gallium nitride layer and the second conductivity type regions.

    Lateral insulated gate bipolar transistor with low turn-on overshoot current

    公开(公告)号:US11367785B2

    公开(公告)日:2022-06-21

    申请号:US17606216

    申请日:2020-03-31

    摘要: A lateral insulated gate bipolar transistor (IGBT) with a low turn-on overshoot current is provided to reduce a peak value of a current flowing through a device during turn-on of a second gate pulse while preventing a current capability and a withstand voltage capability from being degraded. The lateral IGBT includes: a buried oxygen arranged on a P-type substrate, an N-type drift region arranged on the buried oxygen, on which a P-type body region and an N-type buffer region are arranged, a P-type collector region arranged in the N-type buffer region, a field oxide layer arranged above the N-type drift region, a P-type well region arranged in the P-type body region, and a P-type emitter region and an emitter region arranged in the P-type well region, where inner boundaries of the foregoing 4 regions are synchronously recessed to form a pinch-off region. A gate oxide layer is arranged on a surface of the P-type body region, and a polysilicon gate is arranged on the gate oxide layer. The polysilicon gate includes a first gate located above the surface of the P-type body region and a second gate located above the pinch-off region and the N-type drift region. The first gate is connected to a first gate resistor, and the second gate is connected to a second gate resistor.

    Self-adaptive synchronous rectification control system and method of active clamp flyback converter

    公开(公告)号:US11081967B2

    公开(公告)日:2021-08-03

    申请号:US16617508

    申请日:2018-09-28

    IPC分类号: H02M3/335 H02M1/08 H02M1/00

    摘要: The invention discloses a self-adaptive synchronous rectification control system and a self-adaptive synchronous rectification control method of an active clamp flyback converter. The control system comprises a sampling and signal processing circuit, a control circuit with a microcontroller as a core and a gate driver. According to the control method, a switching-on state, an early switching-off state, a late switching-off state and an exact switching-off state of a secondary synchronous rectifier of the active clamp flyback converter can be directly detected, and the synchronous rectifier and a switching-on time of the synchronous rectifier in next cycle can be controlled according to a detection result. After several cycles of self-adaptive control, the synchronous rectifier enters the exact switching-on state, thus avoiding oscillation of an output waveform of the active clamp flyback converter.

    Circuit for enhancing robustness of sub-threshold SRAM memory cell
    9.
    发明授权
    Circuit for enhancing robustness of sub-threshold SRAM memory cell 有权
    用于增强子阈值SRAM存储单元鲁棒性的电路

    公开(公告)号:US09236115B2

    公开(公告)日:2016-01-12

    申请号:US14369651

    申请日:2012-12-27

    摘要: A circuit for improving process robustness of sub-threshold SRAM memory cells serves as an auxiliary circuit for a sub-threshold SRAM memory cell. The output of the circuit is connected to PMOS transistors of the sub-threshold SRAM memory cell and substrate of PMOS transistors in the circuit. The circuit includes a detection circuit for threshold voltages of the PMOS transistors and a differential input and single-ended output amplifier. The circuit changes the substrate voltage of the PMOS transistors in the sub-threshold SRAM memory cell and the PMOS transistors in the circuit in a self-adapting manner by detecting threshold voltage fluctuations of PMOS and NMOS transistor resulted from process fluctuations and thereby regulates the threshold voltages of the PMOS transistors, so that the threshold voltages of the PMOS and NMOS transistors match. The circuit improves the noise margin of sub-threshold SRAM memory cells and the process robustness of sub-threshold SRAM memory cells.

    摘要翻译: 用于提高子阈值SRAM存储单元的工艺稳健性的电路用作子阈值SRAM存储单元的辅助电路。 电路的输出端连接到子阈值SRAM存储单元的PMOS晶体管和电路中PMOS晶体管的衬底。 该电路包括用于PMOS晶体管的阈值电压的检测电路和差分输入和单端输出放大器。 该电路通过检测来自过程波动的PMOS和NMOS晶体管的阈值电压波动,以自适应的方式改变子阈值SRAM存储单元中的PMOS晶体管的衬底电压和电路中的PMOS晶体管,从而调节阈值 PMOS晶体管的电压,使得PMOS和NMOS晶体管的阈值电压匹配。 该电路提高了亚阈值SRAM存储单元的噪声容限和子阈值SRAM存储单元的工艺稳健性。

    Noise current compensation circuit
    10.
    发明授权
    Noise current compensation circuit 有权
    噪声电流补偿电路

    公开(公告)号:US08922265B1

    公开(公告)日:2014-12-30

    申请号:US14369652

    申请日:2012-12-27

    IPC分类号: H03L5/00 H03K3/013 H03K3/012

    摘要: Disclosed is a noise current compensation circuit. The circuit is provided with two input and output terminals A and B, and two control terminals CON and CONF. The control terminals control a work mode (work state and pre-charge state) of the compensation circuit. The compensation circuit consists of 7 PMOS transistors and 8 NMOS transistors. In the normal work state, by detecting changes of potential change rate of two signal lines in an original circuit, the noise current compensation circuit automatically enables one end of the original circuit that discharges slowly to discharge a signal more slowly, and enables one end of the original circuit that discharges rapidly to discharge a signal more rapidly, thus eliminating the influence of the noise current on the circuit and providing assistance for correct identification of subsequent circuit signals. The current compensation circuit can be used for an SRAM bit line leakage current compensation circuit, because the existence of a large leakage current on the SRAM bit line leads to the decreasing of a voltage difference between two ends of the bit line, resulting in that a subsequent circuit cannot correctly identify a signal.

    摘要翻译: 公开了一种噪声电流补偿电路。 该电路设有两个输入和输出端子A和B,以及两个控制端子CON和CONF。 控制端子控制补偿电路的工作模式(工作状态和预充电状态)。 补偿电路由7个PMOS晶体管和8个NMOS晶体管组成。 在正常工作状态下,通过检测原始电路中两根信号线的电位变化率的变化,噪声电流补偿电路自动使缓慢放电的原电路的一端缓慢放电,使一端 原始电路快速放电以更快地放电信号,从而消除噪声电流对电路的影响,并为后续电路信号的正确识别提供帮助。 电流补偿电路可以用于SRAM位线漏电流补偿电路,因为SRAM位线上存在大的漏电流导致位线两端之间的电压差减小,导致 后续电路无法正确识别信号。