公开(公告)号：US20180152048A1

公开(公告)日：2018-05-31

申请号：US15362563

申请日：2016-11-28

Applicant: Texas Instruments Incorporated

Inventor： Kosha Mahmodieh ,  Gianpaolo Lisi ,  Ali Djabbari ,  Jingwei Xu ,  Vijayalakshmi Devarajan

IPC: H02J50/10 ,  H02J7/02

CPC classification number: H02J50/10 ,  H02J7/025 ,  H02J50/12

Abstract: Methods, apparatus, systems and articles of manufacture to efficiently transfer power wirelessly are disclosed. An example apparatus includes a feedback loop to when a second current value is greater than a first current value, change a direction value, the second current value being obtained after the first current value; when the second current value is less than the first current value, maintain the direction value; and a summer to when the direction value corresponds to a first direction value, increase a reference signal by a step size; and when the direction value corresponds to a second direction value different than the first direction value, decrease the reference signal by the step size.

公开(公告)号：US10116294B1

公开(公告)日：2018-10-30

申请号：US15498385

申请日：2017-04-26

Applicant: Texas Instruments Incorporated

Inventor： Jingwei Xu ,  Vijayalakshmi Devarajan ,  Gangqiang Zhang ,  Angelo William Pereira

IPC: H03B1/00 ,  H03K5/1536 ,  H03K5/15 ,  H03K17/687 ,  H02J7/02 ,  H02J50/10 ,  H02J7/10

CPC classification number: H03K5/1536 ,  H02J7/025 ,  H02J50/10 ,  H02J2007/105 ,  H03K5/1508 ,  H03K17/687

Abstract: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.

公开(公告)号：US20150372678A1

公开(公告)日：2015-12-24

申请号：US14742540

申请日：2015-06-17

Applicant: Texas Instruments Incorporated

Inventor： Ruochen Zhang ,  Xiaofan Qiu ,  Jingwei Xu ,  Qingjie Ma

IPC: H03K19/0175

CPC classification number: H03K17/165 ,  H03K17/0822 ,  H03K17/284 ,  H03K19/017509 ,  H03K2217/0027

Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low. The adaptive masking circuitry detects a Miller plateau in the gate voltage of the external NMOS transistor. The adaptive masking circuitry stops masking the output of the comparator after the end of the Miller plateau.

Abstract translation: 一种用于驱动具有通过负载耦合到电源的漏极的NMOS晶体管的栅极驱动器IC。 栅极驱动器输出驱动NMOS晶体管的栅极。 比较器接收NMOS晶体管的漏极电压，并将其与表示漏极和电源之间的短路状态的参考电压进行比较。 如果漏极电压大于参考电压，则比较器输出第一值，并且如果漏极电压小于等于参考电压则输出第二值。 如果比较器输出为第一值，则控制电路接收第一比较器的输出并将栅极驱动器的电压拉低。 自适应屏蔽电路在对栅极驱动器输出施加“导通”信号时可操作以掩蔽比较器的输出，使得漏极电压大于参考电压的条件不会导致控制电路拉 栅极驱动器的电压输出低电平。 自适应屏蔽电路检测外部NMOS晶体管的栅极电压的米勒平台。 自适应屏蔽电路在米勒平台结束后停止屏蔽比较器的输出。