公开(公告)号：US07248243B2

公开(公告)日：2007-07-24

申请号：US10438886

申请日：2003-05-16

申请人： Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shunsuke Hayashi ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino

发明人： Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shunsuke Hayashi ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino

IPC分类号： H03K19/0175 ,  H03L5/00 ,  G09G3/28 ,  G09G3/36 ,  G09G5/00

CPC分类号： G09G3/3611 ,  G09G2300/0408 ,  G09G2310/0289 ,  H03K19/0013 ,  H03K19/018521

摘要： A level shift circuit includes first and second level shifters which respectively output first and second output signals that are produced by level shifting two kinds of input clock signals whose high level periods do not overlap. The level shift circuit also includes control transistors and control lines which, together, prevent a feedthrough current from flowing into the second level shifter when the first output signal is high level, and prevent a feedthrough current from flowing into the first level shifter when the second output signal is high level, so as to suspend the level shift operation of the first and second level shifters. With the level shift circuit, power consumption during a specific time period in a non-active period of the clock signal can be eliminated, where the specific time period of one clock signal is the active period of the other clock signal.

摘要翻译： 电平移位电路包括第一和第二电平移位器，其分别输出通过电平移位高电平周期不重叠的两种输入时钟信号产生的第一和第二输出信号。 电平移位电路还包括控制晶体管和控制线，其一起在第一输出信号为高电平时防止馈通电流流入第二电平移位器，并且当第二电平移位器第二输出信号为高电平时，防止馈通电流流入第一电平移位器 输出信号是高电平，以便暂停第一和第二电平移位器的电平移位操作。 利用电平移位电路，可以消除在时钟信号的非有效周期中的特定时间段内的功率消耗，其中一个时钟信号的特定时间周期是另一个时钟信号的有效周期。

公开(公告)号：US20070024567A1

公开(公告)日：2007-02-01

申请号：US11543218

申请日：2006-10-05

申请人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

发明人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.

摘要翻译： 移位寄存器包括多级触发器。 作为其前一触发器的最后级触发器Fn和触发器Fn-1通过向其输入来自最后级触发器的输出信号而被复位。 在用于输出输出信号的最后级触发器的输出端Q和用于接收输出信号的最后级触发器的输入端R之间提供延迟装置，用于延迟输出的输入 信号到输入端R.触发器Fn在同一时间或在先前的触发器Fn-1复位之后复位。 通过这种布置，可以防止由于不能重置触发器而引起的电路故障。

公开(公告)号：US20060070840A1

公开(公告)日：2006-04-06

申请号：US11222781

申请日：2005-09-12

申请人： Shunsuke Hayashi ,  Masahiro Seguchi ,  Masayasu Ueno ,  Hidetoshi Hata ,  Hisanori Takemura ,  Junji Nishiwaki

发明人： Shunsuke Hayashi ,  Masahiro Seguchi ,  Masayasu Ueno ,  Hidetoshi Hata ,  Hisanori Takemura ,  Junji Nishiwaki

IPC分类号： G07F7/04 ,  B65H9/00

CPC分类号： B65H9/166 ,  B65H2404/1442 ,  B65H2701/1912

摘要： A sheet handling apparatus is proposed to be able to stably shift a position of a sheet. A sheet handling apparatus comprises: conveyance device for conveying a sheet; shift device, rotating in a direction inclined relative to a direction of conveyance of the sheet, for coming into contact with the sheet to shift a position of the sheet in a widthwise direction of conveyance; and shift presence and absence switching device for switching between a shift execution state, in which shift of the sheet is executed by the shift device, and a shift non-execution state, in which the shift is not executed by the shift device; wherein at least a part of that contact portion of the shift device, which comes into contact with a surface of the sheet, is positioned at a side of a shift direction relative to the conveyance device, which has a conveyance force during shift, and a frictional force of the shift device on the sheet at the time of execution of shift is set to be larger than that of the conveyance device on the sheet.

摘要翻译： 提出了能够稳定地移动片材的位置的片材处理装置。 一种片材处理装置，包括：输送片材的输送装置; 移动装置，沿相对于片材的输送方向倾斜的方向旋转，用于与片材接触，以在片材的宽度方向上移动位置; 以及用于在由换档装置执行纸张的移动的换档执行状态和不由换档装置执行移位的换档不执行状态之间切换的换档有无切换装置; 其特征在于，与所述片材的表面接触的所述移动装置的所述接触部的至少一部分位于相对于所述输送装置的移动方向的一侧，所述输送装置在移动期间具有输送力，并且 移动装置在执行换档时在片材上的摩擦力被设定为大于片材上的输送装置的摩擦力。

公开(公告)号：US20050200072A1

公开(公告)日：2005-09-15

申请号：US11068435

申请日：2005-03-01

申请人： Hideyuki Sawayama ,  Daisuke Tokunaga ,  Shunsuke Hayashi ,  Sho Mizuno

发明人： Hideyuki Sawayama ,  Daisuke Tokunaga ,  Shunsuke Hayashi ,  Sho Mizuno

IPC分类号： G07D9/00 ,  B65H1/26 ,  B65H5/00 ,  B65H9/06 ,  B65H31/20 ,  G07D11/00 ,  G07D13/00

CPC分类号： G07D11/0018 ,  B65H9/06 ,  B65H2701/1912

摘要： A sheet housing part of a sheet handling machine is provided with a guide member for adjusting a size of a housing space of the sheet housing part. A tip end part of the guide member is made pivotable, and is provided with a biasing member for swinging the tip end part in a direction of a side wall of the sheet housing part. A gap provided between the guide member and an inner wall of the sheet housing part is closed with this construction, and thereby, a foreign matter is prevented from entering this gap.

摘要翻译： 片材处理机的片材容纳部分设置有用于调节片材容纳部分的容纳空间的尺寸的引导构件。 引导构件的前端部能够枢转，并且设置有用于使前端部沿着片材容纳部的侧壁的方向摆动的偏置构件。 通过这种结构，在引导构件和片材容纳部的内壁之间设置的间隙封闭，从而防止异物进入该间隙。

公开(公告)号：US06556583B1

公开(公告)日：2003-04-29

申请号：US09255427

申请日：1999-02-22

申请人： Shunsuke Hayashi ,  Hideo Matsukawa ,  Toyoaki Yokoi

发明人： Shunsuke Hayashi ,  Hideo Matsukawa ,  Toyoaki Yokoi

IPC分类号： H04L1266

CPC分类号： H04L12/403 ,  G06F11/1625 ,  H04L12/40182 ,  H04L12/4625

摘要： A communication control system and method comprising, in one embodiment, a master station connected to a slave station using two redundant buses, wherein command frames having the same content are sent out to the buses and the communication process is changed depending on whether or not the contents of the command frames, when received by the a receiving station, are identical. In another embodiment, a plurality of units are connected to each bus in a multi-drop configuration, and a line length of each bus is defined so that reflected signals from other units reach a receiving unit on each bus after the transition period of a received signal at that receiving unit ends. In still another embodiment, a unit is connected to each bus and the unit is provided with a driver IC, wherein transmission data is first encoded into bit signals having a fixed number of bits, then the signals are supplied to the driver IC. In a further embodiment, a plurality of strobe signals are generated at different timings in a transmission circuit and a plurality of latch circuits equal to the number of strobe signals are provided in a receiver circuit so that data is retained in each latch circuit using the strobe signals one at a time. In a still further embodiment, an arbitration procedure is carried out using an arbitration bus when a bus master desires to use a data bus immediately after using the data bus, wherein it is determined whether arbitration has been carried out using the arbitration bus, and if none has been carried out, the arbitration procedure is omitted and the bus master is allowed to aquire the right to again use the data bus.

摘要翻译： 一种通信控制系统和方法，在一个实施例中，包括使用两个冗余总线连接到从站的主站，其中具有相同内容的命令帧被发送到总线，并且通信过程根据是否改变 当接收站接收到命令帧的内容是相同的。 在另一个实施例中，多个单元以多点配置连接到每个总线，并且每个总线的线路长度被定义成使得来自其它单元的反射信号在接收到的过渡时段之后到达每个总线上的接收单元 信号在接收单元结束。 在另一个实施例中，单元连接到每个总线，并且该单元设置有驱动器IC，其中传输数据首先被编码为具有固定位数的位信号，然后将信号提供给驱动器IC。 在另一实施例中，在传输电路中以不同的定时产生多个选通信号，并且在接收机电路中提供等于选通信号数量的多个锁存电路，以便数据被保留在每个锁存电路中，使用频闪 一次发出一个信号。 在又一个实施例中，当总线主机在使用数据总线之后立即使用数据总线时，使用仲裁总线执行仲裁程序，其中确定是否已经使用仲裁总线进行仲裁，以及如果 没有一个被执行，仲裁程序被省略，总线主机被允许再次使用数据总线。

公开(公告)号：US07648138B2

公开(公告)日：2010-01-19

申请号：US11222781

申请日：2005-09-12

申请人： Shunsuke Hayashi ,  Masahiro Seguchi ,  Masayasu Ueno ,  Hidetoshi Hata ,  Hisanori Takemura ,  Junji Nishiwaki

发明人： Shunsuke Hayashi ,  Masahiro Seguchi ,  Masayasu Ueno ,  Hidetoshi Hata ,  Hisanori Takemura ,  Junji Nishiwaki

IPC分类号： B65H7/02 ,  B65H9/00 ,  B65H9/04

CPC分类号： B65H9/166 ,  B65H2404/1442 ,  B65H2701/1912

摘要： A sheet handling apparatus is proposed to be able to stably shift a position of a sheet. A sheet handling apparatus comprises: conveyance device for conveying a sheet; shift device, rotating in a direction inclined relative to a direction of conveyance of the sheet, for coming into contact with the sheet to shift a position of the sheet in a widthwise direction of conveyance; and shift presence and absence switching device for switching between a shift execution state, in which shift of the sheet is executed by the shift device, and a shift non-execution state, in which the shift is not executed by the shift device; wherein at least a part of that contact portion of the shift device, which comes into contact with a surface of the sheet, is positioned at a side of a shift direction relative to the conveyance device, which has a conveyance force during shift, and a frictional force of the shift device on the sheet at the time of execution of shift is set to be larger than that of the conveyance device on the sheet.

摘要翻译： 提出了能够稳定地移动片材的位置的片材处理装置。 一种片材处理装置，包括：输送片材的输送装置; 移动装置，沿相对于片材的输送方向倾斜的方向旋转，用于与片材接触，以在片材的宽度方向上移动位置; 以及用于在由换档装置执行纸张的移动的换档执行状态和不由换档装置执行移位的换档不执行状态之间切换的换档有无切换装置; 其特征在于，与所述片材的表面接触的所述移动装置的所述接触部的至少一部分位于相对于所述输送装置的移动方向的一侧，所述输送装置在移动期间具有输送力，并且 移动装置在执行换档时在片材上的摩擦力被设定为大于片材上的输送装置的摩擦力。

公开(公告)号：US20090013102A1

公开(公告)日：2009-01-08

申请号：US11658247

申请日：2005-07-20

申请人： Shunsuke Hayashi

发明人： Shunsuke Hayashi

IPC分类号： G06F13/00 ,  H04L12/28

CPC分类号： H04L67/125 ,  H04L67/14 ,  H04L67/28 ,  H04L67/2823 ,  H04L67/34

摘要： A communication system has: a controller that is connected to a plurality of field devices for inputting and outputting an analog signal and a digital signal; and a system computer that is provided in an upper hierarchical layer of the controller, and communicates with one of the plurality of field devices by using the digital signal through the controller. The communication system further has a path establishing section that selects a field device for communication from the plural field devices, and establishes a virtual communication channel to be a communication path for performing one-to-one communication with the selected field device via the system computer and the controller.

摘要翻译： 通信系统具有连接到多个现场设备的控制器，用于输入和输出模拟信号和数字信号; 以及设置在所述控制器的上层的系统计算机，并且通过使用所述数字信号通过所述控制器与所述多个现场设备之一进行通信。 通信系统还具有路径建立部，其从多个现场设备中选择用于通信的现场设备，并且建立虚拟通信信道作为用于经由系统计算机与所选择的现场设备进行一对一通信的通信路径 和控制器。

公开(公告)号：US07274351B2

公开(公告)日：2007-09-25

申请号：US10446149

申请日：2003-05-28

申请人： Hajime Washio ,  Shunsuke Hayashi

发明人： Hajime Washio ,  Shunsuke Hayashi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G2310/0248

摘要： A driver circuit for a display device includes a plurality of set-reset flip-flops and switch circuits, and is arranged so that a timing pulse for sampling outputted from the flip-flop is supplied to the switch circuit, so as to cause the switch circuit to receive a clock signal. The clock signal operates as a set signal of the next stage flip-flop and outputted as a control signal for carrying out pre-charging of a data signal line and a selected pixel connected to the data signal line, with a switch. Thus, in case of performing pre-charging of a signal supplying line with an internal pre-charging circuit by using a pre-charging power source having small driving ability, this arrangement can provide a driver circuit for a display device capable of preventing fluctuation of a signal supplied to a different signal supplying line, while keeping the circuit scale of the shift register small.

摘要翻译： 用于显示装置的驱动器电路包括多个设定复位触发器和开关电路，并且被布置成使得从触发器输出的用于采样的定时脉冲被提供给开关电路，以便使开关 电路接收时钟信号。 时钟信号作为下一级触发器的设定信号工作，并作为控制信号输出，用于通过开关对数据信号线和连接到数据信号线的选择像素进行预充电。 因此，在通过使用具有小驱动能力的预充电电源来对信号供给线进行内部预充电电路的预充电的情况下，可以提供能够防止波动的显示装置的驱动电路 在保持移位寄存器的电路规模的同时，提供给不同信号供给线路的信号。

公开(公告)号：US20070024568A1

公开(公告)日：2007-02-01

申请号：US11543219

申请日：2006-10-05

申请人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

发明人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.

公开(公告)号：US07133017B2

公开(公告)日：2006-11-07

申请号：US10387860

申请日：2003-03-14

申请人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

发明人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.