公开(公告)号：US08326927B2

公开(公告)日：2012-12-04

申请号：US11439311

申请日：2006-05-23

申请人： Aseem Asthana ,  Manjunath S. Bangalore ,  Binh Don Ha ,  Vineet Goel ,  Connie Tang

发明人： Aseem Asthana ,  Manjunath S. Bangalore ,  Binh Don Ha ,  Vineet Goel ,  Connie Tang

IPC分类号： G06F15/16 ,  G06F15/173 ,  H04L12/16 ,  H04B7/00

CPC分类号： H04L12/1822 ,  H04L51/04 ,  H04M3/493 ,  H04M3/564 ,  H04M3/567 ,  H04M2201/38

摘要： A conferencing system and method includes, during the conference session, invoking an interactive voice response (IVR) routine that provides names of one or more conference participants to a user of an audio-only endpoint device responsive to a request from the user to create a sidebar session. An invitation to join the sidebar session is then communicated to each of one or more participants selected by the user, the invitation being communicated via a private media channel separate from a media stream associated with the conference session. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

摘要翻译： 会议系统和方法包括在会议期间，响应于来自用户的请求创建一个或多个会话参与者的请求，该会话会话调用一个交互式语音响应（IVR）例程，其提供一个或多个会议参与者的名称， 侧边栏会话。 然后，将加入边栏会话的邀请传递给用户选择的一个或多个参与者中的每一个，邀请通过与与会议会话相关联的媒体流分开的专用媒体信道进行传送。 要强调的是，该摘要被提供以符合要求抽象的规则，允许搜索者或其他读者快速确定技术公开的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US20100053158A1

公开(公告)日：2010-03-04

申请号：US12617209

申请日：2009-11-12

申请人： Vineet Goel

发明人： Vineet Goel

IPC分类号： G06T17/20

CPC分类号： G06T17/20

摘要： A hardware tessellation circuit serves as a unified hardware parametric coordinate generator for providing parametric coordinates for tessellation. The tessellation circuit includes control logic that receives tessellation instruction information, such as an instruction indicating which type of multiple tessellation operations to perform, on an incoming primitive wherein the different types of tessellation include discrete tessellation, continuous tessellation and adaptive tessellation. The tessellation circuit also includes shared tessellation logic that is controlled by the control logic, and includes a plurality of shared logic units, such as arithmetic logic units, that are controllable by the control logic based on the type of tessellation detected to be used for the incoming primitive. The shared tessellation logic is controlled to reuse at least some of the logic units for two different tessellation operations defined by the tessellation type information.

摘要翻译： 硬件细分电路用作统一的硬件参数坐标发生器，用于提供镶嵌的参数坐标。 细分电路包括控制逻辑，该控制逻辑接收镶嵌指令信息，诸如指示要执行哪种类型的多个镶嵌操作的指令，其中不同类型的镶嵌包括离散镶嵌，连续镶嵌和自适应镶嵌。 细分电路还包括由控制逻辑控制的共享镶嵌逻辑，并且包括多个共享逻辑单元，例如算术逻辑单元，其可由控制逻辑基于被检测为用于 传入原始 控制共享的镶嵌逻辑以重用至少一些逻辑单元用于由细分类型信息定义的两个不同的镶嵌操作。

公开(公告)号：US06940503B2

公开(公告)日：2005-09-06

申请号：US09852808

申请日：2001-05-10

申请人： Alexander C. Vlachos ,  Vineet Goel

发明人： Alexander C. Vlachos ,  Vineet Goel

IPC分类号： G06T17/20 ,  G06T17/00

CPC分类号： G06T17/20 ,  G06T2200/28

摘要： A method and apparatus for processing non-planar video graphics primitives is presented. Vertex parameters corresponding to vertices of a video graphics primitive are received, where the video graphics primitive is a non-planar, or higher-order, video graphics primitive. A cubic Bezier control mesh is calculated using the vertex parameters provided for the non-planar video graphics primitive. Two techniques for calculating control points included in the cubic Bezier control mesh along the edges of the non-planar video graphics primitive are described. The central control point is determined based on the average of a set of reflected vertices, where each of the reflected vertices is a vertex of the non-planar video graphics primitive reflected through a line defined by a pair of control points corresponding to the vertex. The resulting cubic Bezier triangular control mesh is evaluated using the Bernstein polynomial at the vertices of the planar video graphics primitives that result from tessellation, where the number of planar video graphics primitives produced can be controlled based on a selected tessellation level. The resulting planar video graphics primitives are then provided to a conventional 3D pipeline for processing to produce pixel data for blending in the frame buffer.

摘要翻译： 提出了一种用于处理非平面视频图形图元的方法和装置。 接收对应于视频图形基元的顶点的顶点参数，其中视频图形原语是非平面或更高阶的视频图形原语。 使用为非平面视频图形图元提供的顶点参数来计算立方贝塞尔控制网格。 描述了用于计算沿着非平面视频图形图形边缘的三次贝塞尔控制网格中包含的控制点的两种技术。 基于一组反射顶点的平均值确定中央控制点，其中每个反射顶点是通过由对应于该顶点的一对控制点定义的线反射的非平面视频图形原语的顶点。 使用由镶嵌形成的平面视频图形基元的顶点处的伯恩斯坦多项式来评估所得的立方贝塞尔三角形控制网格，其中可以基于选定的镶嵌级别来控制产生的平面视频图形基元的数量。 然后将所产生的平面视频图形原语提供给常规3D流水线进行处理以产生用于混合在帧缓冲器中的像素数据。

公开(公告)号：US06664960B2

公开(公告)日：2003-12-16

申请号：US09853840

申请日：2001-05-10

申请人： Vineet Goel ,  Robert S. Hartog ,  Michael A. Mang

发明人： Vineet Goel ,  Robert S. Hartog ,  Michael A. Mang

IPC分类号： G06T1500

CPC分类号： G06T17/20

摘要： An apparatus for processing a non-planar graphics primitive employs an associated method of operation and includes a controller, at least one computation engine, memory and at least one lookup table. Responsive to operation codes issued by the controller, the computation engine(s) determines a group of control points based on the position coordinates and normal vectors of the non-planar primitive vertices. The computation engine(s) then determines position coordinates of supplemental vertices defining multiple planar tessellated primitives based on the control points and stored weighting factors that provide a cubic relation between the control points and the position coordinates of the supplemental vertices. A first memory stores at least the control points and at least one lookup table stores the cubic weighting factors. A second memory stores the position coordinates of the non-planar primitive vertices and the supplemental vertices of the planar primitives generated through tessellation for further graphics processing.

摘要翻译： 用于处理非平面图形基元的装置采用相关联的操作方法，并且包括控制器，至少一个计算引擎，存储器和至少一个查找表。 响应于由控制器发出的操作代码，计算引擎基于非平面原始顶点的位置坐标和法向量确定一组控制点。 然后，计算引擎基于控制点和存储的加权因子来确定在控制点和补充顶点的位置坐标之间提供立方关系的定义多个平面镶嵌图元的补充顶点的位置坐标。 第一存储器至少存储控制点，并且至少一个查找表存储立方加权因子。 第二存储器存储非平面原始顶点的位置坐标和通过细分的生成的平面基元的补充顶点以进一步的图形处理。

公开(公告)号：US6057848A

公开(公告)日：2000-05-02

申请号：US921916

申请日：1997-08-27

申请人： Vineet Goel

发明人： Vineet Goel

IPC分类号： G06T17/30 ,  G06T15/04 ,  G06T17/20 ,  G06F15/00

CPC分类号： G06T17/20 ,  G06T15/04

摘要： A high order surface patch rendering system. A patch is rendered by subdividing a patch until the subpatches are sufficiently flat that they can be approximated by a quadrilateral, which can then be split diagonally and written to a rasterizer in the form of two triangles. In one embodiment, the patch rendering system receives rational coordinates (X,Y,Z,W) and attribute coordinates (color, opacity, texture) of control points of the Bezier surface patch. The patch rendering system divides and subdivides the surface patch by operating on the surface patch control points to produce subpatch control points. The rational coordinates of the control points are converted to spatial coordinates, and if the current subpatch is determined to be flat, the spatial coordinates and attributes of the subpatch corner points are provided to an output buffer in the form of triangle vertices with associated attributes. The patch rendering system which includes a patch tessellation device for converting a Bezier surface patch having a set of control points to a plurality of triangles for display. The patch tessellation device comprises a patch buffer, a patch division unit, a homogeneous coordinate unit, and a corner unit. The patch buffer is configured to receive and store rational coordinates of current control points of a current surface patch. The patch division unit is coupled to receive the rational coordinates of the current control points from the patch buffer and configured to calculate rational coordinates of new control points for a new surface patch. The homogeneous coordinate unit is coupled to receive the rational coordinates of the new control points and configured to convert the rational coordinates of the new control points to spatial coordinates of the new control points. The corner unit is coupled to the homogeneous coordinate unit to receive the spatial coordinates of new control points which correspond to corner points of the new surface patch, and configured to provide the spatial coordinates for corner points of the new surface patch as triangle vertices to an output buffer if the new surface patch is classified as flat. In addition to the coordinates, the patch tessellation device may also operate on Bezier patches specifying attributes of the surface patches.

公开(公告)号：US09244690B2

公开(公告)日：2016-01-26

申请号：US12878667

申请日：2010-09-09

申请人： Todd Martin ,  Vineet Goel

发明人： Todd Martin ,  Vineet Goel

IPC分类号： G06F9/38 ,  G06F15/17 ,  G06T1/00

CPC分类号： G06F9/3851 ,  G06F15/17 ,  G06T1/00

摘要： A system and method are presented by which data on a graphics processing unit (GPU) can be output to one or more buffers with independent output frequencies. In one embodiment, a GPU includes a shader processor configured to respectively emit a plurality of data sets into a plurality of streams in parallel. Each data is emitted into at least a portion of its respective stream. Also included is a first number of counters configured to respectively track the emitted data sets.

摘要翻译： 提出了一种系统和方法，其中图形处理单元（GPU）上的数据可以被输出到具有独立输出频率的一个或多个缓冲器。 在一个实施例中，GPU包括着色器处理器，其被配置为并行地将多个数据集分别发射成多个流。 每个数据被发射到其相应流的至少一部分。 还包括配置为分别跟踪发射的数据集的第一数量的计数器。

公开(公告)号：US07907707B2

公开(公告)日：2011-03-15

申请号：US11448286

申请日：2006-06-07

申请人： Vineet Goel ,  Aseem Asthana ,  Ashish Chotai ,  Sravan Vadlakonda

发明人： Vineet Goel ,  Aseem Asthana ,  Ashish Chotai ,  Sravan Vadlakonda

IPC分类号： H04M1/64 ,  H04M1/24

CPC分类号： H04M3/53366 ,  H04M3/53325 ,  H04M2203/4554

摘要： Techniques for storing voicemails in real-time in a caller's voicemail system when a voicemail is left in a callee's voicemail system are provided. A connection to the callee's voicemail system is detected during a call from the caller to the callee. When a voicemail is being left on the caller's voicemail system, a copy of the voicemail message is automatically forked to the caller's voicemail system. Thus, when a voicemail message is recorded on the callee's voicemail system, a copy of the voicemail message is also stored on the caller's voicemail system.

摘要翻译： 提供了当在被叫方的语音邮件系统中留下语音邮件时，在呼叫者的语音邮件系统中实时存储语音邮件的技术。 在从呼叫者到被叫者的呼叫期间，检测到被叫者的语音邮件系统的连接。 当主叫方的语音邮件系统上留下语音信箱时，语音邮件消息的副本会自动分配给主叫方的语音邮件系统。 因此，当被叫者的语音邮件系统上记录语音邮件消息时，语音邮件消息的副本也存储在呼叫者的语音邮件系统上。

公开(公告)号：US07639252B2

公开(公告)日：2009-12-29

申请号：US11161669

申请日：2005-08-11

申请人： Vineet Goel

发明人： Vineet Goel

IPC分类号： G06T15/00 ,  G06T15/30

CPC分类号： G06T17/20

摘要： A hardware tessellation circuit serves as a unified hardware parametric coordinate generator for providing parametric coordinates for tessellation. The tessellation circuit includes control logic that receives tessellation instruction information, such as an instruction indicating which type of multiple tessellation operations to perform, on an incoming primitive wherein the different types of tessellation include discrete tessellation, continuous tessellation and adaptive tessellation. The tessellation circuit also includes shared tessellation logic that is controlled by the control logic, and includes a plurality of shared logic units, such as arithmetic logic units, that are controllable by the control logic based on the type of tessellation detected to be used for the incoming primitive. The shared tessellation logic is controlled to reuse at least some of the logic units for two different tessellation operations defined by the tessellation type information.

摘要翻译： 硬件细分电路用作统一的硬件参数坐标发生器，用于提供镶嵌的参数坐标。 细分电路包括控制逻辑，该控制逻辑接收镶嵌指令信息，诸如指示要执行哪种类型的多个镶嵌操作的指令，其中不同类型的镶嵌包括离散镶嵌，连续镶嵌和自适应镶嵌。 细分电路还包括由控制逻辑控制的共享镶嵌逻辑，并且包括多个共享逻辑单元，例如算术逻辑单元，其可由控制逻辑基于被检测为用于 传入原始 控制共享的镶嵌逻辑以重用至少一些逻辑单元用于由细分类型信息定义的两个不同的镶嵌操作。

公开(公告)号：US07145564B1

公开(公告)日：2006-12-05

申请号：US09585217

申请日：2000-06-01

申请人： Alexander C. Vlachos ,  Vineet Goel

发明人： Alexander C. Vlachos ,  Vineet Goel

IPC分类号： G06T15/00

CPC分类号： G06T17/20 ,  G06T15/80

摘要： A method and apparatus for performing tessellation lighting operations for video graphics primitives in a video graphics system is presented. When the vertex parameters corresponding to the vertices of a video graphics primitive are received, a tessellation operation is performed such that a number of component primitives are generated. The vertex parameters corresponding to the vertices of the component primitives are then calculated utilizing the vertex parameters for the original video graphics primitive. Such calculation operations include determining a corresponding normal vector for each component primitive vertex. Each of the component primitives is then individually processed. Such processing may include calculating the lighting effects for each component primitive and performing additional processing operations that generate pixel fragments for the primitive. The resulting pixel fragments are blended with image data stored in a frame buffer, where the image data is used in generating a displayed image.

摘要翻译： 提出了一种用于对视频图形系统中的视频图形图元执行镶嵌照明操作的方法和装置。 当接收到对应于视频图形原语的顶点的顶点参数时，执行细分操作，使得生成多个组件基元。 然后使用原始视频图形原语的顶点参数计算与组件基元的顶点对应的顶点参数。 这样的计算操作包括确定每个分量原始顶点的相应法向量。 然后单独处理每个组件原语。 这样的处理可以包括计算每个组件原语的照明效果并且执行生成图元的像素片段的附加处理操作。 所得到的像素碎片与存储在帧缓冲器中的图像数据混合，其中图像数据用于生成显示的图像。

公开(公告)号：US20060238535A1

公开(公告)日：2006-10-26

申请号：US11428756

申请日：2006-07-05

申请人： Vineet Goel ,  Stephen Morein ,  R. Hartog

发明人： Vineet Goel ,  Stephen Morein ,  R. Hartog

IPC分类号： G06T17/20

CPC分类号： G06T17/20 ,  G06T15/005 ,  G06T2200/28

摘要： A method and apparatus for dual pass adaptive tessellation includes a vertex grouper tessellator operably coupled to receive primitive information and an index list and a shader processing unit coupled to the vertex grouper tessellator. During a first pass, the shader processing unit receives primitive indices generated from the primitive information and an auto-index value for each of the plurality of primitive indices. The method and apparatus further includes a plurality of vertex shader input staging registers operably coupled to the shader sequence, wherein the plurality of vertex shader input staging registers are coupled to a plurality of vertex shaders such that in response to a shader sequence output, the vertex shaders generate tessellation factors. The tessellation factors are provided to the vertex grouper tessellator such that the vertex grouper tessellator generates a per-process vector output, a per primitive output and a per packet output during a second pass.

摘要翻译： 用于双通道适应性镶嵌的方法和装置包括可操作地耦合以接收原始信息的顶点石斑鱼细分器和索引列表以及耦合到顶点石斑鱼细分器的着色器处理单元。 在第一次通过期间，着色器处理单元接收从原始信息生成的原始索引和多个基元索引中的每一个的自动索引值。 所述方法和装置还包括可操作地耦合到着色器序列的多个顶点着色器输入暂存寄存器，其中多个顶点着色器输入暂存寄存器耦合到多个顶点着色器，使得响应于着色器序列输出，顶点 着色器产生细分因素。 将细分因子提供给顶点分组器细分器，使得顶点分割器细分器在第二遍期间生成每个进程向量输出，每个基元输出和每个分组输出。