Method and apparatus for tessellation lighting
    1.
    发明授权
    Method and apparatus for tessellation lighting 有权
    用于镶嵌照明的方法和装置

    公开(公告)号:US07145564B1

    公开(公告)日:2006-12-05

    申请号:US09585217

    申请日:2000-06-01

    IPC分类号: G06T15/00

    CPC分类号: G06T17/20 G06T15/80

    摘要: A method and apparatus for performing tessellation lighting operations for video graphics primitives in a video graphics system is presented. When the vertex parameters corresponding to the vertices of a video graphics primitive are received, a tessellation operation is performed such that a number of component primitives are generated. The vertex parameters corresponding to the vertices of the component primitives are then calculated utilizing the vertex parameters for the original video graphics primitive. Such calculation operations include determining a corresponding normal vector for each component primitive vertex. Each of the component primitives is then individually processed. Such processing may include calculating the lighting effects for each component primitive and performing additional processing operations that generate pixel fragments for the primitive. The resulting pixel fragments are blended with image data stored in a frame buffer, where the image data is used in generating a displayed image.

    摘要翻译: 提出了一种用于对视频图形系统中的视频图形图元执行镶嵌照明操作的方法和装置。 当接收到对应于视频图形原语的顶点的顶点参数时,执行细分操作,使得生成多个组件基元。 然后使用原始视频图形原语的顶点参数计算与组件基元的顶点对应的顶点参数。 这样的计算操作包括确定每个分量原始顶点的相应法向量。 然后单独处理每个组件原语。 这样的处理可以包括计算每个组件原语的照明效果并且执行生成图元的像素片段的附加处理操作。 所得到的像素碎片与存储在帧缓冲器中的图像数据混合,其中图像数据用于生成显示的图像。

    Method and apparatus for processing non-planar video graphics primitives
    2.
    发明授权
    Method and apparatus for processing non-planar video graphics primitives 有权
    用于处理非平面视频图形图元的方法和装置

    公开(公告)号:US06940503B2

    公开(公告)日:2005-09-06

    申请号:US09852808

    申请日:2001-05-10

    IPC分类号: G06T17/20 G06T17/00

    CPC分类号: G06T17/20 G06T2200/28

    摘要: A method and apparatus for processing non-planar video graphics primitives is presented. Vertex parameters corresponding to vertices of a video graphics primitive are received, where the video graphics primitive is a non-planar, or higher-order, video graphics primitive. A cubic Bezier control mesh is calculated using the vertex parameters provided for the non-planar video graphics primitive. Two techniques for calculating control points included in the cubic Bezier control mesh along the edges of the non-planar video graphics primitive are described. The central control point is determined based on the average of a set of reflected vertices, where each of the reflected vertices is a vertex of the non-planar video graphics primitive reflected through a line defined by a pair of control points corresponding to the vertex. The resulting cubic Bezier triangular control mesh is evaluated using the Bernstein polynomial at the vertices of the planar video graphics primitives that result from tessellation, where the number of planar video graphics primitives produced can be controlled based on a selected tessellation level. The resulting planar video graphics primitives are then provided to a conventional 3D pipeline for processing to produce pixel data for blending in the frame buffer.

    摘要翻译: 提出了一种用于处理非平面视频图形图元的方法和装置。 接收对应于视频图形基元的顶点的顶点参数,其中视频图形原语是非平面或更高阶的视频图形原语。 使用为非平面视频图形图元提供的顶点参数来计算立方贝塞尔控制网格。 描述了用于计算沿着非平面视频图形图形边缘的三次贝塞尔控制网格中包含的控制点的两种技术。 基于一组反射顶点的平均值确定中央控制点,其中每个反射顶点是通过由对应于该顶点的一对控制点定义的线反射的非平面视频图形原语的顶点。 使用由镶嵌形成的平面视频图形基元的顶点处的伯恩斯坦多项式来评估所得的立方贝塞尔三角形控制网格,其中可以基于选定的镶嵌级别来控制产生的平面视频图形基元的数量。 然后将所产生的平面视频图形原语提供给常规3D流水线进行处理以产生用于混合在帧缓冲器中的像素数据。

    Computation reduced tessellation
    3.
    发明授权
    Computation reduced tessellation 有权
    计算减少了细分

    公开(公告)号:US09142060B2

    公开(公告)日:2015-09-22

    申请号:US13599218

    申请日:2012-08-30

    IPC分类号: G06T17/20

    CPC分类号: G06T17/20

    摘要: Systems and methods for a tessellation are described. The tessellation unit is configured to determine a number of points that reside along a first edge of a first ring within a domain, determine a first set of coordinates for a first portion of the points that reside along the first edge of the first ring within the domain, and determine a second set of coordinates for a second portion of the points that reside along the first edge of the first ring within the domain based on the first set of coordinates for the first portion. The tessellation unit is also configured to stitch points that reside along the first edge of the first ring with points that reside along a second edge of a second ring to divide the domain into a plurality of primitives that are mapped to a patch.

    摘要翻译: 描述了细分的系统和方法。 该细分单元被配置为确定沿着域内的第一环的第一边缘驻留的点的数量,确定沿着第一环的第一边缘驻留的点的第一部分的第一组坐标, 并且基于第一部分的第一坐标集合来确定沿着第一环的第一边缘的第一部分驻留的第二部分坐标的第二坐标集合。 细分单元还被配置为沿着沿着第二环的第二边缘驻留的点将沿着第一环的第一边缘的点进行缝合,以将该域划分成映射到补丁的多个基元。

    Tessellation engine and applications thereof
    6.
    发明授权
    Tessellation engine and applications thereof 有权
    细分引擎及其应用

    公开(公告)号:US08884957B2

    公开(公告)日:2014-11-11

    申请号:US12708331

    申请日:2010-02-18

    IPC分类号: G06T15/30 G06T17/20

    CPC分类号: G06T17/20 G06T2200/28

    摘要: Disclosed herein methods, apparatuses, and systems for performing graphics processing. In this regard, a processing unit includes a tessellation module and a connectivity module. The tessellation module is configured to sequentially tessellate portions of a geometric shape to provide a series of tessellation points for the geometric shape. The connectivity module is configured to connect one or more groups of the tessellation points into one or more primitives in an order in which the series of tessellation points is provided.

    摘要翻译: 本文公开了用于执行图形处理的方法,装置和系统。 在这方面,处理单元包括细分模块和连接模块。 镶嵌模块被配置为顺序地细分几何形状的部分以提供用于几何形状的一系列镶嵌点。 连接模块被配置为以一系列镶嵌点被提供的顺序将一个或多个镶嵌点组组合成一个或多个图元。

    Tessellation Patterns
    7.
    发明申请
    Tessellation Patterns 有权
    镶嵌模式

    公开(公告)号:US20130162651A1

    公开(公告)日:2013-06-27

    申请号:US13336635

    申请日:2011-12-23

    IPC分类号: G06T11/20

    CPC分类号: G06T17/20

    摘要: Methods, systems, and computer readable media embodiments are disclosed for generating primitives in a grid. Embodiments include generating a set of vertices in a section of the grid, selecting one or more vertices in the set of vertices in an order based on a proximity of the vertices to a boundary edge of the grid, and generating primitives based on the order of the selected vertices.

    摘要翻译: 公开了用于在网格中生成图元的方法,系统和计算机可读介质实施例。 实施例包括在网格的一部分中生成一组顶点,基于顶点到网格的边界边缘的顺序,以一定顺序选择顶点集合中的一个或多个顶点,并且基于网格的顺序生成图元 所选顶点。

    Merged shader for primitive amplification
    8.
    发明授权
    Merged shader for primitive amplification 有权
    合并着色器进行原始放大

    公开(公告)号:US08259111B2

    公开(公告)日:2012-09-04

    申请号:US12185474

    申请日:2008-08-04

    IPC分类号: G06T15/50 G06T15/10 G06T1/20

    CPC分类号: G06T15/005

    摘要: A method, computer program product, and system are provided for processing data in a graphics pipeline. An embodiment of the method includes processing one or more vertices of a geometric primitive with a vertex shader function and generating new primitive information for the one or more processed vertices with a geometry shader function. The geometry shader function receives one or more processed vertices from the vertex shader function and emits a single vertex associated with the new primitive information. Each emitted vertex from the geometry shader function can be stored in a memory device. Unlike conventional graphic pipelines that require a memory device for data storage during the vertex and geometry shading processes, the present invention increases efficiency in the graphics pipeline by eliminating the need to access memory when the vertex and geometry shaders process vertex information.

    摘要翻译: 提供了一种用于在图形管线中处理数据的方法,计算机程序产品和系统。 该方法的一个实施例包括使用顶点着色器功能处理几何基元的一个或多个顶点,并使用几何着色器功能为一个或多个经处理的顶点生成新的基元信息。 几何着色器功能从顶点着色器功能接收一个或多个经处理的顶点,并发出与新的基元信息相关联的单个顶点。 来自几何着色器功能的每个发出的顶点都可以存储在存储设备中。 与在顶点和几何着色处理期间需要用于数据存储的存储器件的传统图形流水线不同,本发明通过在顶点和几何着色器处理顶点信息时消除对存储器的访问来提高图形流水线的效率。

    Multi-Primitive System
    9.
    发明申请
    Multi-Primitive System 审中-公开
    多原始系统

    公开(公告)号:US20120019541A1

    公开(公告)日:2012-01-26

    申请号:US12839965

    申请日:2010-07-20

    IPC分类号: G06F15/80

    CPC分类号: G06T15/005

    摘要: Disclosed herein is a vertex core. The vertex core includes a grouper module configured to process two or more primitives during one clock period and two or more vertex translators configured to respectively receive the two or more processed primitives in parallel.

    摘要翻译: 这里公开了顶点核心。 顶点核心包括被配置为在一个时钟周期期间处理两个或多个基元的分层器模块,以及被配置为分别并行地接收两个或多个处理的原语的两个或多个顶点翻译器。

    Variable Frequency Output To One Or More Buffers
    10.
    发明申请
    Variable Frequency Output To One Or More Buffers 有权
    变频输出到一个或多个缓冲器

    公开(公告)号:US20110057938A1

    公开(公告)日:2011-03-10

    申请号:US12878667

    申请日:2010-09-09

    IPC分类号: G06F15/80 G06F9/302 G06F9/305

    CPC分类号: G06F9/3851 G06F15/17 G06T1/00

    摘要: A system and method are presented by which data on a graphics processing unit (GPU) can be output to one or more buffers with independent output frequencies. In one embodiment, a GPU includes a shader processor configured to respectively emit a plurality of data sets into a plurality of streams in parallel. Each data is emitted into at least a portion of its respective stream. Also included is a first number of counters configured to respectively track the emitted data sets.

    摘要翻译: 提出了一种系统和方法,其中图形处理单元(GPU)上的数据可以被输出到具有独立输出频率的一个或多个缓冲器。 在一个实施例中,GPU包括着色器处理器,其被配置为并行地将多个数据集分别发射成多个流。 每个数据被发射到其相应流的至少一部分。 还包括配置为分别跟踪发射的数据集的第一数量的计数器。