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公开(公告)号：US09529946B1
公开(公告)日：2016-12-27
申请号：US13676035
申请日：2012-11-13
Applicant: Xilinx, Inc.
Inventor： Paul R. Schumacher , Graham F. Schelle , Patrick Lysaght , Alan M. Frost
CPC classification number: G06F17/5022 , G06F11/00 , G06F11/261 , G06F11/3062 , G06F11/3457 , G06F17/5027
Abstract: An integrated circuit can include a processor operable to execute program code and an Intellectual Property (IP) modeling block. The IP modeling block can include a first port through which the IP modeling block receives first modeling data and a second port coupled to the processor through which the first IP modeling block communicates with the processor during emulation. The first IP modeling block also can include a power emulation circuit. The power emulation circuit is configured to consume a variable amount of power as specified by the first modeling data received via the first port.
Abstract translation: 集成电路可以包括可操作以执行程序代码和知识产权（IP）建模块的处理器。 IP建模块可以包括第一端口，IP建模块通过该第一端口接收第一建模数据，以及耦合到处理器的第二端口，第一IP建模块在仿真期间与处理器通信。 第一个IP建模块还可以包括一个电源仿真电路。 功率仿真电路被配置为消耗由经由第一端口接收的第一建模数据指定的可变量的功率。
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公开(公告)号：US09058135B1
公开(公告)日：2015-06-16
申请号：US13674621
申请日：2012-11-12
Applicant: Xilinx, Inc.
Inventor： Paul R. Schumacher , Graham F. Schelle
Abstract: Testing a digital system includes calculating a first ratio of a first clock frequency for a first clock domain and a second clock frequency for a second clock domain different from the first clock domain using a processing device and calculating a first offset between a first timer in the first clock domain and a second timer in the second clock domain. Using an expression dependent upon the first offset and the first ratio, event data from at least one of the first clock domain or the second clock domain is converted to a common clock domain.
Abstract translation: 测试数字系统包括使用处理装置计算第一时钟频率的第一时钟频率和与第一时钟域不同的第二时钟域的第二时钟频率，并且计算第一时钟频率 第一时钟域和第二时钟域中的第二定时器。 使用依赖于第一偏移和第一比率的表达式，来自第一时钟域或第二时钟域中的至少一个的事件数据被转换为公共时钟域。
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