Flip-flop circuit
    21.
    发明授权
    Flip-flop circuit 有权
    触发电路

    公开(公告)号:US06181180B2

    公开(公告)日:2001-01-30

    申请号:US09340417

    申请日:1999-06-28

    IPC分类号: H03K3356

    CPC分类号: H03K3/356121 H03K3/012

    摘要: A low power, high performance flip-flop includes a first branch having a number of transistors connected in series, and a second branch having a number of transistors connected in series. A clock signal and a data input signal are coupleable to the first and second branches of the circuit, the circuit generating a stable logic one or logic zero. The circuit has low power consumption and high performance speed.

    摘要翻译: 低功率,高性能触发器包括具有串联连接的多个晶体管的第一分支和具有串联连接的多个晶体管的第二分支。 时钟信号和数据输入信号可耦合到电路的第一和第二分支,电路产生稳定的逻辑1或逻辑0。 该电路具有低功耗和高性能的速度。