公开(公告)号：US08813099B2

公开(公告)日：2014-08-19

申请号：US14180894

申请日：2014-02-14

Applicant: STMicroelectronics R&D (Shanghai) Co., Ltd.

Inventor： Christophe Quarre ,  Maoping Weng ,  Zhe Wu

IPC: G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC classification number: G06F9/54 ,  G06F9/44521

Abstract: The present invention provides a technical solution for a unified driver used in a handheld device. An embodiment of the technical solution may comprise a unified driving method used in a handheld device, which method may comprise: determining driver types of currently installed hardware; setting a current dispatch table on the basis of the driver type and a unified dispatch table suitable for multiple hardware and driving corresponding hardware or software by calling the current dispatch table.

公开(公告)号：US20130173949A1

公开(公告)日：2013-07-04

申请号：US13716029

申请日：2012-12-14

Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.

Inventor： Panny Cai ,  Martin Huag

IPC: G06F1/04

CPC classification number: G06F1/04 ,  G06F3/044 ,  G06F11/3051

Abstract: A method for recovering a clock frequency of a CAN bus, the method including: receiving a data signal, wherein the data signal includes at least one state transition; detecting the state transition; and adjusting a frequency of a clocking signal generated by an oscillator circuit, wherein the frequency is adjusted when the state transition is detected and adjusting the frequency is for recovering the clock frequency of the CAN bus.

Abstract translation: 一种用于恢复CAN总线的时钟频率的方法，所述方法包括：接收数据信号，其中所述数据信号包括至少一个状态转换; 检测状态转换; 以及调整由振荡器电路产生的时钟信号的频率，其中当检测到状态转换时调整频率，并且调整频率用于恢复CAN总线的时钟频率。

公开(公告)号：US20130169344A1

公开(公告)日：2013-07-04

申请号：US13657930

申请日：2012-10-23

Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.

Inventor： Ming Jiang ,  Jerry Cui

IPC: H03K17/693

CPC classification number: H03K17/102

Abstract: A drive circuit includes a switching transistor having a design maximum voltage V2 and a cascode transistor having a design maximum voltage V1, wherein the cascode transistor is source-drain coupled in series with the switching transistor. The circuit further includes a current source coupled between an intermediate voltage node and a gate of the cascode transistor. If the drive circuit is a low side driver, the intermediate voltage node receives an intermediate voltage Vmed set below a high supply voltage Vhigh and that meets the following conditions: a) Vmed

Abstract translation: 驱动电路包括具有设计最大电压V2的开关晶体管和具有设计最大电压V1的共源共栅晶体管，其中共源共栅晶体管是与开关晶体管串联耦合的源极 - 漏极。 电路还包括耦合在中间电压节点和共源共栅晶体管的栅极之间的电流源。 如果驱动电路是低端驱动器，则中间电压节点接收设置在高电源电压Vhigh以下的中间电压Vmed，并满足以下条件：a）Vmed <= V2和b）Vhigh-Vmed <= V1。 如果驱动电路是高侧驱动器，则中间电压节点接收低于高电源电压的中间电压Vmed，并且符合以下条件：a）Vmed <= V1和b）Vhigh-Vmed <= V2。 该电路可以通过将高侧驱动器和低侧驱动器串联耦合而构造为推挽驱动器。

公开(公告)号：US20120326901A1

公开(公告)日：2012-12-27

申请号：US13331611

申请日：2011-12-20

Applicant: Jian Hua Zhao ,  Yuxing Zhang

Inventor： Jian Hua Zhao ,  Yuxing Zhang

IPC: H03M1/12 ,  H03M1/06

CPC classification number: H03M1/06 ,  H03M1/0604 ,  H03M1/0695 ,  H03M1/468

Abstract: In one embodiment, a method for converting an analog input value to a digital output value is disclosed. A successive approximation is performed. The analog input is quantized to a first quantized value, which is converted to a first analog value using a DAC. The first analog value is subtracted from the analog input value to form a first residue. The first residue is quantized to form a second quantized value, and a second residue is formed by converting the second quantized value to a second analog value using the DAC and subtracting the second analog value from the first residue value. The second residue is then quantized to form a third quantized value. The first, second and third quantized values are converted into a digital output value. The first, second and third quantized values each have at least three levels.

Abstract translation: 在一个实施例中，公开了一种将模拟输入值转换为数字输出值的方法。 执行逐次逼近。 模拟输入被量化为第一量化值，其使用DAC被转换为第一模拟值。 从模拟输入值中减去第一个模拟值，形成第一个残差。 量化第一残余物以形成第二量化值，并且通过使用DAC将第二量化值转换为第二模拟值并从第一残留值减去第二模拟值来形成第二残差。 然后将第二残基量化以形成第三量子化值。 第一，第二和第三量化值被转换为数字输出值。 第一，第二和第三量化值各自至少有三个等级。

公开(公告)号：US20100169898A1

公开(公告)日：2010-07-01

申请号：US12650279

申请日：2009-12-30

Applicant: Christophe Quarre ,  Maoping Weng ,  Zhe Wu

Inventor： Christophe Quarre ,  Maoping Weng ,  Zhe Wu

IPC: G06F9/44 ,  G06F12/00

CPC classification number: G06F9/54 ,  G06F9/44521

Abstract: The present invention provides a technical solution for a unified driver used in a handheld device. An embodiment of the technical solution may comprise a unified driving method used in a handheld device, which method may comprise: determining driver types of currently installed hardware; setting a current dispatch table on the basis of the driver type and a unified dispatch table suitable for multiple hardware and driving corresponding hardware or software by calling the current dispatch table.

Abstract translation: 本发明提供了用于手持设备中的统一驱动程序的技术方案。 技术方案的实施例可以包括在手持设备中使用的统一驱动方法，该方法可以包括：确定当前安装的硬件的驱动器类型; 基于驱动程序类型设置当前调度表，并通过调用当前调度表来适用于多个硬件并驱动相应的硬件或软件的统一调度表。

公开(公告)号：US20080055138A1

公开(公告)日：2008-03-06

申请号：US11832144

申请日：2007-08-01

Applicant: Yuxing Zhang ,  Xiaoru Gao

Inventor： Yuxing Zhang ,  Xiaoru Gao

IPC: H03M1/66

CPC classification number: G09G3/3614 ,  G09G2320/0247 ,  H03M1/68

Abstract: A calibrator circuit and method for VCOM voltage adjustment for an LCD includes using integrated programmable resistive arrays. The method uses two DACs and three integrated circuit arrays to provide all of the advantages of VCOM calibrator circuits using external resistive voltage-dividers. The integrated circuit resistor arrays reduce the number of external components and PCB space. The method used is suitable for higher resolution adjustment of the VCOM voltage and no calculation is required in the whole adjustment procedure, which saves labor cost, time and enables automation of the calibrator fabrication.

Abstract translation: 用于LCD的VCOM电压调整的校准器电路和方法包括使用集成可编程电阻阵列。 该方法使用两个DAC和三个集成电路阵列，以提供使用外部电阻分压器的VCOM校准器电路的所有优点。 集成电路电阻阵列减少了外部元件数量和PCB空间。 所使用的方法适用于VCOM电压的更高分辨率调整，并且在整个调整过程中不需要计算，从而节省人工成本，节省时间并实现校准器制造的自动化。

公开(公告)号：US09032239B2

公开(公告)日：2015-05-12

申请号：US13716029

申请日：2012-12-14

Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.

Inventor： Panny Cai ,  Martin Haug

IPC: G06F1/04 ,  G06F1/12 ,  G06F11/30 ,  G06F3/044

CPC classification number: G06F1/04 ,  G06F3/044 ,  G06F11/3051

Abstract: A method for recovering a clock frequency of a CAN bus, the method including: receiving a data signal, wherein the data signal includes at least one state transition; detecting the state transition; and adjusting a frequency of a clocking signal generated by an oscillator circuit, wherein the frequency is adjusted when the state transition is detected and adjusting the frequency is for recovering the clock frequency of the CAN bus.

Abstract translation: 一种用于恢复CAN总线的时钟频率的方法，所述方法包括：接收数据信号，其中所述数据信号包括至少一个状态转换; 检测状态转换; 以及调整由振荡器电路产生的时钟信号的频率，其中当检测到状态转换时调整频率，并且调整频率用于恢复CAN总线的时钟频率。

公开(公告)号：US08732729B2

公开(公告)日：2014-05-20

申请号：US12650279

申请日：2009-12-30

Applicant: Christophe Quarre ,  Maoping Weng ,  Zhe Wu

Inventor： Christophe Quarre ,  Maoping Weng ,  Zhe Wu

IPC: G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC classification number: G06F9/54 ,  G06F9/44521

Abstract: The present invention provides a technical solution for a unified driver used in a handheld device. An embodiment of the technical solution may comprise a unified driving method used in a handheld device, which method may comprise: determining driver types of currently installed hardware; setting a current dispatch table on the basis of the driver type and a unified dispatch table suitable for multiple hardware and driving corresponding hardware or software by calling the current dispatch table.

Abstract translation: 本发明提供了用于手持设备中的统一驱动程序的技术方案。 技术方案的实施例可以包括在手持设备中使用的统一驱动方法，该方法可以包括：确定当前安装的硬件的驱动器类型; 基于驱动程序类型设置当前调度表，并通过调用当前调度表来适用于多个硬件并驱动相应的硬件或软件的统一调度表。

公开(公告)号：US20130169324A1

公开(公告)日：2013-07-04

申请号：US13648557

申请日：2012-10-10

Applicant: STMicroelectronics R&D (Shanghai) Co. Ltd.

Inventor： Tao Tao Huang ,  Meng Wang

IPC: H03K4/02

CPC classification number: H03K4/502

Abstract: A fully integrated ramp generator circuit includes a first current generator that sources current to first capacitor through a first transistor that is gate controlled by the complement of a periodic signal. The ramping voltage stored on the first capacitor is buffered to an output node as a ramp output signal. A second transistor couples the output node to the first current generator and is gate controlled by the periodic signal. The periodic signal is generated at the output of a flip-flop that receives an input clock signal and reset signal. The reset signal is generated by a comparator circuit operable to compare the voltage on a second capacitor to a reference. The second capacitor is charged by a second current source and discharged by a third transistor that is gate controlled by the periodic signal.

Abstract translation: 完全集成的斜坡发生器电路包括第一电流发生器，其通过由周期信号的补码门控制的第一晶体管向第一电容器供电。 存储在第一电容器上的斜坡电压作为斜坡输出信号被缓冲到输出节点。 第二晶体管将输出节点耦合到第一电流发生器，并由周期信号进行栅极控制。 周期性信号在接收输入时钟信号和复位信号的触发器的输出端产生。 复位信号由比较器电路产生，比较器电路可操作以将第二电容器上的电压与参考电压进行比较。 第二电容器由第二电流源充电，并由被周期信号门控制的第三晶体管放电。

公开(公告)号：US20120062303A1

公开(公告)日：2012-03-15

申请号：US12965663

申请日：2010-12-10

Applicant: Jian Hua Zhao ,  Reed Yang

Inventor： Jian Hua Zhao ,  Reed Yang

IPC: H03L5/00

CPC classification number: H03M1/80 ,  H03M1/66

Abstract: For voltage interpolation amplifiers used in digital-to-analog converter architecture, the number of input differential pairs required by the voltage interpolation amplifier may be reduced such that an N-bit voltage interpolation amplifier comprises N+1 input differential pairs connected through a resistor attenuation network to provide a binary-weighted effective transconductance. In comparison to conventional voltage interpolation amplifier designs, the number of input differential pairs and power consumed by the circuit is significantly reduced, thereby creating a more area- and power-efficient voltage interpolation amplifier.

Abstract translation: 对于用于数模转换器架构的电压内插放大器，可以减小电压内插放大器所需的输入差分对的数量，使得N位电压内插放大器包括通过电阻衰减连接的N + 1个输入差分对 网络提供二进制加权有效跨导。 与传统的电压内插放大器设计相比，输入差分对的数量和电路消耗的功率大大降低，从而创建了一个面积更大且功耗更高的电压内插放大器。