公开(公告)号：US06300554B1

公开(公告)日：2001-10-09

申请号：US09392574

申请日：1999-09-09

申请人： Chen-Hsun Du ,  Bruce C. S. Chou ,  Chengkuo Lee

发明人： Chen-Hsun Du ,  Bruce C. S. Chou ,  Chengkuo Lee

IPC分类号： H01L3534

CPC分类号： H01L35/32 ,  G01J5/12 ,  H01L35/34

摘要： A thermoelectric sensor device is disclosed consisting of polysilicon, titanium or AlSiCu as the thermocouple of material for thermoelectric sensor device. The features of the present process are: Selecting a material such as aluminum, titanium, aluminum alloy or titanium alloy with lower thermal conductivity coefficient as thermocouple element line and making use of zigzag structure with thermocouple element line, and increasing the length of thermocouple element line. Employing front side Si bulk etching technique to etch the silicon substrate, which is under the device and empty of silicon substrate, so as to reduce the superficial measure of thermoelectric sensor module and increase the throughout of the silicon wafer. Simultaneously, fabricating a resistor to treat as a heater on the membrane for adjusting the device.

摘要翻译： 公开了一种由多晶硅，钛或AlSiCu组成的热电传感器装置，作为热电传感器装置的热电偶。 本工艺的特点是：选择较低导热系数的铝，钛，铝合金或钛合金材料作为热电偶元件线，并使用带有热电偶元件线的锯齿形结构，并增加热电偶元件线的长度 。 采用正面Si体蚀刻技术来蚀刻位于器件下方的硅衬底，并清空硅衬底，以便减少热电传感器模块的表面测量并增加整个硅晶片。 同时，制造电阻器作为膜上的加热器来调节装置。

公开(公告)号：US06252154B1

公开(公告)日：2001-06-26

申请号：US09407969

申请日：1999-09-29

申请人： Kazuo Kamada ,  Shunichi Nakayama

发明人： Kazuo Kamada ,  Shunichi Nakayama

IPC分类号： H01L3534

CPC分类号： H01L35/32

摘要： A thermoelectric module 1 comprising p-type thermoelectric elements 3a and n-type thermoelectric elements 3b which are alternately arranged and electrically connected by electrodes 4 provided on the top side and the bottom side of each thermoelectric element 3 and a heat exchanger plate 5 which is fixed on the electrodes on each side, in which each thermoelectric element 3 has a coating film 2 of an insulating material on the sides thereof except the sides joined to the electrodes 4, and the thermoelectric elements 3 are spaced apart. The coating film 2 improves the strength and moisture resistance of the thermoelectric elements 3 to prevent thermoelectric elements from cracking or breaking even in cases where a load, a shock, or a thermal stress is imposed thereon and to protect the thermoelectric elements against corrosion in a high humidity atmosphere, providing a thermoelectric module 1 with improved operational reliability.

摘要翻译： 包含p型热电元件3a和n型热电元件3b的热电模块1和设置在每个热电元件3的顶侧和底侧上的电极4交替布置和电连接，热交换器板5是 固定在每侧的电极上，其中每个热电元件3除了连接到电极4的侧面之外具有绝缘材料的涂层膜2，并且热电元件3间隔开。 涂膜2提高了热电元件3的强度和耐湿性，以防止即使在施加负载，冲击或热应力的情况下热电元件也不会破裂或断裂，并且保护热电元件免受腐蚀 高湿度气氛，提供具有改善的操作可靠性的热电模块1。

公开(公告)号：US06677515B2

公开(公告)日：2004-01-13

申请号：US09928581

申请日：2001-08-13

申请人： Jun Wang ,  Daniel S. Marshall

发明人： Jun Wang ,  Daniel S. Marshall

IPC分类号： H01L3534

CPC分类号： H01L35/34 ,  H01L35/22

摘要： A thermoelectric material is disclosed that is manufactured from a method including the steps of: providing a Group IV element boride, and doping the Group IV element boride with a doping element chosen from one of the column III, IV, V elements, wherein the doping element is different from the Group IV element in the Group IV element boride, and the doping element is not boron. An alternate method of fabricating a thermoelectric material includes the steps of simultaneously growing on a substrate a Group IV element boride and at least one doping element chosen from one of the Group III, IV, or V elements wherein the doping element is different than the Group IV element in the Group IV element boride and the doping element is not boron.

摘要翻译： 公开了一种由包括以下步骤的方法制造的热电材料：提供IV族元素硼化物，并用选自III，IV，V族元素之一的掺杂元素掺杂IV族元素硼化物，其中掺杂 元素不同于IV族元素硼化物中的IV族元素，掺杂元素不是硼。 制造热电材料的替代方法包括以下步骤：在衬底上同时生长第IV族元素硼化物和选自III，IV或V族元素之一的至少一种掺杂元素，其中掺杂元素不同于组 IV族元素硼化物中的IV元素和掺杂元素不是硼。

公开(公告)号：US06620994B2

公开(公告)日：2003-09-16

申请号：US09971280

申请日：2001-10-04

申请人： Andrea Rossi

发明人： Andrea Rossi

IPC分类号： H01L3534

CPC分类号： H01L35/16 ,  H01L35/18

摘要： A thermoelectric module including a couple formed between two bismuth telluride thermoelectrodes. The first thermoelectrode is doped with palladium, selenium, or a combination of the two. The second thermoelectrode is doped with antimony, gold, or a combination of the two. Multiple thermoelectric modules may be used in series and parallel to achieve the desired voltage and current outputs.

公开(公告)号：US06441296B2

公开(公告)日：2002-08-27

申请号：US09752695

申请日：2001-01-03

申请人： Hisato Hiraishi ,  Shigeru Watanabe

发明人： Hisato Hiraishi ,  Shigeru Watanabe

IPC分类号： H01L3534

CPC分类号： H01L35/34 ,  H01L35/32

摘要： The invention provides a method of fabricating a thermoelectric device, whereby a grooved block composed of n-type thermoelectric semiconductor and a grooved block composed of p-type thermoelectric semiconductor, provided with a plurality of grooves formed therein, respectively, at a same pitch and parallel with each other, are formed such that a depthwise portion of respective grooved blocks is left intact, and then, an integrated block is formed by fitting and adhering together the grooved blocks composed of the n-type and p-type thermoelectric semiconductors, respectively, filling up gaps in fitting parts with adhesive insulation members. After removing portions of the integrated block, other than the fitting parts where the n-type and p-type thermoelectric semiconductors are fitted to each other, n-type and p-type thermoelectric semiconductor pieces are exposed, and by forming electrodes for connecting the pieces to each other alternately and in series, the thermoelectric device is completed.

公开(公告)号：US06403875B1

公开(公告)日：2002-06-11

申请号：US09790509

申请日：2001-02-23

申请人： Shinji Karino ,  Ryouma Tsukuda ,  Yuichi Anno ,  Isamu Yashima ,  Hitoshi Kajino

发明人： Shinji Karino ,  Ryouma Tsukuda ,  Yuichi Anno ,  Isamu Yashima ,  Hitoshi Kajino

IPC分类号： H01L3534

CPC分类号： H01L35/34

摘要： A process for producing a thermoelectric material comprising mixing at least two of bismuth, tellurium, selenium, and antimony and, if desired, a dopant, melting the mixture, grinding the resulting alloy ingot, forming the powder, and sintering the green body under normal pressure, or hot pressing the powder, wherein the grinding and the normal sintering or hot pressing are carried out in the presence of a solvent represented by CnH2n+1OH or CnH2n+2CO (wherein n is 1, 2 or 3).

公开(公告)号：US06403874B1

公开(公告)日：2002-06-11

申请号：US09441787

申请日：1999-11-17

申请人： Ali Shakouri ,  John E. Bowers

发明人： Ali Shakouri ,  John E. Bowers

IPC分类号： H01L3534

CPC分类号： H01L29/861 ,  H01J45/00 ,  H01L29/205 ,  H01L29/267

摘要： A heterostructure thermionic cooler and a method for making thermionic coolers, employing a barrier layer of varying conduction bandedge for n-type material, or varying valence bandedge for p-type material, that is placed between two layers of material. The barrier layer bandedge is at least kBT higher than the Fermi level of the semiconductor layer, which allows only selected, “hot” electrons, or electrons of high enough energy, across the barrier. The barrier layer is constructed to have an internal electric field such that the electrons that make it over the initial barrier are assisted in travel to the anode. Once electrons drop to the energy level of the anode, they lose energy to the lattice, thus heating the lattice at the anode. The barrier height of the barrier layer is high enough to prevent the electrons from traveling in the reverse direction.

摘要翻译： 异质结构热离子冷却器和用于制造热离子冷却器的方法，使用放置在两层材料之间的用于n型材料的变化的导带的阻挡层或用于p型材料的变化的带状带。 阻挡层带边缘至少比半导体层的费米能级高kBT，其仅允许穿过势垒的选定的“热”电子或足够高能量的电子。 阻挡层被构造成具有内部电场，使得使其超过初始屏障的电子被辅助到行进到阳极。 一旦电子下降到阳极的能级，它们就会失去晶格的能量，从而在阳极处加热晶格。 阻挡层的势垒高度足够高以防止电子沿相反方向传播。

公开(公告)号：US06369314B1

公开(公告)日：2002-04-09

申请号：US09654532

申请日：2000-09-01

申请人： George S. Nolas

发明人： George S. Nolas

IPC分类号： H01L3534

CPC分类号： H01L35/18

摘要： The present invention allows optimum filling of void spaces typically found in skutterudite type crystal lattice structures associated with various semiconductor materials. Selective filling provides semiconductor materials which are particularly beneficial for use in fabricating thermoelectric devices for electrical power generation and/or cooling applications. By selectively filling a portion of the void spaces associated with skutterudite type crystal lattice structure, reductions in thermal conductivity of the resulting semiconducting material may be optimized while concurrently minimizing any reduction in electrical properties of the resulting semiconductor materials, thus maximizing the thermoelectric figure of merit for the associated thermoelectric device. The present invention allows optimizing both the size and type of atoms and/or molecules used to fill void spaces in skutterudite type crystal lattice structure and to optimize the number of void spaces which are filled by such atoms and/or molecules.

摘要翻译： 本发明允许通常在与各种半导体材料相关联的方钴矿型晶格结构中发现的空隙空间的最佳填充。 选择性填充提供了特别有益于制造用于发电和/或冷却应用的热电装置的半导体材料。 通过选择性地填充与方钴矿型晶格结构相关联的空隙空间的一部分，可以优化所得半导体材料的热导率的降低，同时最小化所得半导体材料的电性能的任何降低，从而最大化热电式的品质因数 用于相关联的热电装置。 本发明允许优化用于填充方钴矿型晶格结构中的空隙的原子和/或分子的尺寸和类型，并优化由这些原子和/或分子填充的空隙空间的数量。

公开(公告)号：US06342668B1

公开(公告)日：2002-01-29

申请号：US09478976

申请日：2000-01-06

申请人： Jean-Pierre Fleurial ,  Alex Borshchevsky ,  Thierry Caillat ,  Donald T. Morelli ,  Gregory P. Meisner

发明人： Jean-Pierre Fleurial ,  Alex Borshchevsky ,  Thierry Caillat ,  Donald T. Morelli ,  Gregory P. Meisner

IPC分类号： H01L3534

CPC分类号： H01L35/32 ,  H01L35/18 ,  H01L35/22

摘要： A class of thermoelectric compounds based on the skutterudite structure with heavy filling atoms in the empty octants and substituting transition metals and main-group atoms. High Seebeck coefficients and low thermal conductivities are achieved in combination with large electrical conductivities in these filled skutterudites for large ZT values. Substituting and filling methods are disclosed to synthesize skutterudite compositions with desired thermoelectric properties. A melting and/or sintering process in combination with powder metallurgy techniques is used to fabricate these new materials.

摘要翻译： 一类基于方钴矿结构的热电化合物，在空的八分圆中具有重的填充原子，并且替代过渡金属和主族原子。 高塞贝克系数和低热导率结合在这些填充的方程中用于大ZT值的大电导率。 公开了替代和填充方法来合成具有所需热电性质的方钴矿组合物。 使用与粉末冶金技术相结合的熔融和/或烧结方法来制造这些新材料。

公开(公告)号：US06342667B1

公开(公告)日：2002-01-29

申请号：US09432696

申请日：1999-11-02

申请人： Chih-Hsiung Shen ,  Chung-Nan Chen ,  San Bao Lin

发明人： Chih-Hsiung Shen ,  Chung-Nan Chen ,  San Bao Lin

IPC分类号： H01L3534

CPC分类号： B81B3/0081 ,  B81C1/00158 ,  H01L35/32 ,  H01L35/34 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A method for forming thermal isolation for a micro thermopile device comprises steps of forming a narrow etching window on the membrane and forming a plurality of micro connection structures each crossing the narrow etching window and connecting the edge portion of the membrane on both sides of the narrow etching window, and etching the silicon substrate through the narrow etching window to form a pit between the silicon substrate and the membrane, whereby the membrane becomes a floating membrane and has thermal isolation with the silicon substrate. By this method, the area of the floating membrane is increased and the strain of the floating membrane is reduced.

摘要翻译： 一种用于形成微热电堆装置的热隔离的方法包括以下步骤：在膜上形成窄的蚀刻窗口，并形成多个微连接结构，每个微连接结构与窄蚀刻窗口交叉，并将薄膜的边缘部分连接在狭窄的两侧 蚀刻窗口，并且通过窄蚀刻窗蚀刻硅衬底，以在硅衬底和膜之间形成凹坑，由此膜变成浮动膜并与硅衬底进行热隔离。 通过该方法，浮膜的面积增加，浮膜的应变减小。