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公开(公告)号：US12300173B2
公开(公告)日：2025-05-13
申请号：US18289015
申请日：2023-01-19
Inventor： Zhidong Yuan , Yongqian Li
IPC: G09G3/3233 , G09G3/32 , G09G3/3258
Abstract: The present disclosure provides a pixel circuit, a display panel and a display apparatus, belongs to the field of display technology, and can solve a problem that a current time for compensating a threshold voltage is limited, and is easily affected by a sub-threshold voltage. The pixel circuit includes a reset sub-circuit, a data writing sub-circuit, a threshold compensation sub-circuit, a sub-threshold compensation sub-circuit, a driving transistor, a first storage capacitor, a first light emitting control sub-circuit, a second light emitting control sub-circuit and a light emitting device; the sub-threshold compensation sub-circuit is configured to store a voltage of a fourth node and compensate a sub-threshold of the driving transistor by using the voltage of the fourth node; the fourth node is a connection point between the sub-threshold compensation sub-circuit, a second electrode of the driving transistor, the data writing sub-circuit and the second light emitting control sub-circuit.
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公开(公告)号：US12300171B2
公开(公告)日：2025-05-13
申请号：US18251069
申请日：2022-05-31
Inventor： Ziyang Yu , Haijun Qiu , Ming Hu , Zhiliang Jiang , Haigang Qing , Yunsheng Xiao , Tiaomei Zhang , Miao Wang
IPC: G09G3/3233
Abstract: A pixel circuit includes a data writing sub-circuit, a driving sub-circuit, and one or more potential maintenance sub-circuits. The data writing sub-circuit is coupled to at least a first voltage signal terminal, a data signal terminal, a first scan signal terminal and a first node, and writes a data signal provided by the data signal terminal into the first node under control of at least a first scan signal provided by the first scan signal terminal. The driving sub-circuit is coupled to the first node, a second node and a third node, and creates a path between the second node and the third node under control of a potential at the first node. A potential maintenance sub-circuit is coupled to a circuit node and a reference signal terminal, and maintains a potential at the circuit node through a reference signal provided by the reference signal terminal.
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公开(公告)号：US12300168B2
公开(公告)日：2025-05-13
申请号：US18026827
申请日：2022-06-14
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3233 , H10K59/131
Abstract: Provided is a display panel. The display panel includes: a substrate; a plurality of first control lines and a plurality of second control lines on a side of the substrate; and a plurality of subpixels arranged in an array on the side of the substrate, wherein at least two of the plurality of subpixels share a first node; wherein the subpixel includes a first circuit and a second circuit, the first circuit and the second circuit being configured to control a voltage at the first node in response to a first control signal and a second control signal; wherein in the display panel, a sum of a number of the plurality of first control lines and a number of the plurality of second control lines is less than or equal to a number of the subpixels in a column direction.
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公开(公告)号：US12300133B2
公开(公告)日：2025-05-13
申请号：US17921486
申请日：2021-11-29
Inventor： Desheng Wang , Zhichao Yang , Yong Zhang , Jian Wang , Lingfang Nie , Longhu Hao , Yashuai An , Peipei Wang , Zanwu Guo , Zhaohu Yu , Feng Qu , Xiaofeng Yin , Jing Pang , Qi Deng
IPC: G09G3/00 , G02F1/1362 , G09G3/36
Abstract: The display panel includes an active area and a border-frame area located at a periphery of the active area, the active area includes a plurality of sub-pixels and a plurality of data lines connected to the sub-pixels, and the border-frame area includes a testing area and a bonding area; the testing area includes a plurality of testing units that are arranged periodically in a first direction, each of the testing units includes one or more switching transistors, a first electrode of each of the switching transistors is connected to a testing-signal lead wire, and a second electrode is connected to one of the data lines; the bonding area includes a plurality of bonding units that are arranged periodically in the first direction, each of the bonding units includes one or more bonding pads, and each of the bonding pads is connected to one of the data lines.
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35.发明授权公开(公告)号：US12299342B2
公开(公告)日：2025-05-13
申请号：US18021403
申请日：2022-01-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ran Wang
IPC: G06F3/14 , H04N19/172 , G06F3/0484
Abstract: A screen projection method includes: generating original frame data based on original display data, and transmitting the original frame data to a target device, for the target device to display an original image generated based on the original frame data; receiving target area information transmitted by the target device, wherein the target area information is position information of a target area to be adjusted on the target device; extracting target display data from the original display data, based on the target area information; and generating target frame data based on the target display data, and transmitting the target frame data to the target device, for the target device to display a target image generated based on the target frame data.
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Patent Agency Ranking
公开(公告)号：US12298641B2
公开(公告)日：2025-05-13
申请号：US18638710
申请日：2024-04-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Guangcai Yuan , Hehe Hu , Ce Ning , Hui Guo , Fengjuan Liu , Dongfang Wang , Zhengliang Li , Jiayu He
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
Abstract: An array substrate and a manufacturing method therefor, and a display apparatus are provided. The array substrate includes an underlay substrate, and at least one first transistor, at least one data line and at least one pixel electrode disposed on the underlay substrate. The at least one first transistor includes a first active layer and a first gate; the first gate is located on a side of the first active layer away from the underlay substrate, and orthographic projections of the first gate and the first active layer on the underlay substrate are at least partially overlapped. The first active layer is electrically connected to the data line and the pixel electrode, respectively. The data line is located on a side of the first active layer close to the underlay substrate, and the pixel electrode is located on a side of the first gate away from the underlay substrate.
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公开(公告)号：US20250151555A1
公开(公告)日：2025-05-08
申请号：US19011729
申请日：2025-01-07
Inventor： Cong LIU , Yao HUANG , Binyan WANG , Weiyun HUANG , Yue LONG
IPC: H10K59/131 , H10K50/822 , H10K59/35
Abstract: Disclosed is a display panel, including: a base substrate including a first display region, a second display region, and a routing region; a first anode layer, a first light-emitting layer and a first cathode layer disposed in the first display region and sequentially stacked in a direction going away from the base substrate; a second cathode layer, a second anode layer, a second light-emitting layer, and a third cathode layer disposed in the second display area and sequentially stacked in the direction going away from the base substrate, and a first signal transmission layer disposed in the routing region; wherein the first signal transmission layer is connected to the second cathode layer and the first cathode layer, and the first signal transmission layer is further configured to receive a power supply signal.
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公开(公告)号：US20250151543A1
公开(公告)日：2025-05-08
申请号：US18691049
申请日：2022-09-28
Inventor： Rong WANG , Yi HE , Cong FAN , Fan HE , Xiangdan DONG
IPC: H10K59/131 , H10K59/12 , H10K59/121
Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a fanout region, the fanout region includes a first transition region, an isolation dam region, and a second transition region. The fanout region includes a gate metal layer and a source-drain metal layer, the gate metal layer includes any one or more of following: a first gate metal layer, a second gate metal layer, and a third gate metal layer. The gate metal layer is provided with a power supply connection line, the source-drain metal layer is provided with a first power supply line, the first power supply line is disposed in the first transition region and the second transition region, a first power supply line of the first transition region and a first power supply line of the second transition region are interconnected through the power supply connection line.
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公开(公告)号：US20250151520A1
公开(公告)日：2025-05-08
申请号：US19011776
申请日：2025-01-07
IPC: H10K59/121 , H10K59/131 , H10K59/65
Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a first display region and a second display region, and a pixel density of the first display region is higher than a pixel density of the second display region. A first pixel circuit of a first sub-pixel in the first display region includes one pixel circuit unit, and a second pixel circuit of a second sub-pixel in the second display region includes two pixel circuit units. The first pixel circuit is configured to be connected with a first power voltage terminal to receive a first power voltage as a pixel power voltage, and the second pixel circuit is configured to be connected with a second power voltage terminal to receive a second power voltage as a pixel power voltage and the first power voltage is different from the second power voltage.
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公开(公告)号：US20250151397A1
公开(公告)日：2025-05-08
申请号：US18832075
申请日：2022-08-31
Inventor： Meng LI
Abstract: A display panel and a display device are provided. The display panel includes a pixel driving circuit, a base substrate, a first reset signal line, a second gate line and a first conductive portion. The orthographic projection of the second gate line on the base substrate is located between the orthographic projection of the first reset signal line on the base substrate and an orthographic projection of the first conductive portion on the base substrate.
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