Abstract:
The present invention discloses an encoder and a decoder that are tunable, controllable, and have low amount of energy loss during encoding or decoding. The encoder comprises a 2×2 EO coupler, and an optical recirculating loop (waveguide) which comprises a semiconductor optic amplifier. The decoder comprises a 2×2 EO coupler, an optical recirculating loop (waveguide) which comprises a semiconductor optic amplifier, a light detector, and a bit determining device. Thus, the structures of the encoder and the decoder are simple, and can be integrated on a photonic integrated circuit so that the reliability is increased and the cost of production decreased.
Abstract:
A receiver for an LCD source driver of an LCD panel includes a converter, a comparing circuit and a decoding circuit. The converter converts two pairs of differential current signals into two pairs of differential voltage signals. The comparing circuit is coupled to the converter for generating reference signals based on differences between the two pairs of differential voltage signals. The decoding circuit is coupled to the comparing circuit for generating data signals, clock signal, setting signals, and control signals based the reference signals.
Abstract:
A scaling apparatus set in a receiver is disclosed. The receiver includes a symbol-processing unit. The scaling apparatus includes a calculating unit and a scaling unit. The calculating unit estimates the signal strength of an input symbol and generates a scaling factor accordingly. The scaling unit scales an output symbol outputted from the symbol-processing unit according to the scaling factor. The output symbol is generated from the symbol-processing unit through processing the input symbol.
Abstract:
The present invention provides a transmission signal generating method for a display device to compensate channel effect. The transmission signal generating method includes using a plurality of signal amplitudes and a first signal direction to generate a plurality of positive levels, using the plurality of signal amplitudes and a second signal direction to generate a plurality of negative levels, and using a plurality of signaling lines for transmission of the pluralities of negative and positive levels. A first positive level and a first negative level both have a minimum signal amplitude of the plurality of signal amplitudes. The amplitude difference of the first positive and negative levels is greater than an amplitude difference of any two neighboring levels of the plurality of negative levels and also the plurality of positive levels.
Abstract:
A data synchronization method for a transmitter of a display device includes utilizing a plurality of first signaling line sets to couple the transmitter and a plurality of receivers in a dedicated type manner, transmitting a synchronization signal to the plurality of receivers according to a transistor-to-transistor logic signal form, transmitting a synchronization start-up signal to the plurality of receivers via the plurality of first signaling line sets a first time later after the synchronization signal is transmitted, and then transmitting a data signal to the plurality of receivers via the plurality of first signaling line sets a second time later after the synchronization start-up signal is transmitted. The synchronization signal has a longer effective time than the synchronization start-up signal.
Abstract:
A method capable of reducing power consumption of source drivers is disclosed. The method includes a reference voltage source charging or discharging a loading end of a source driver to a reference voltage having a polarity the same as a polarity of a target voltage and a voltage level near a voltage level of the target voltage, and an output stage of the source driver charging or discharging the loading end to the target voltage.
Abstract:
A data switching circuit is provided, which reduces power consumption of the source drivers when used together with a dot inversion driving method. The circuit comprises a control unit and a switching unit. Wherein, the control unit provides a switching signal. The switching unit has 2N input terminals and 2N output terminals and receives the switching signal. Assume that N is a positive integer and 1≦i≦N. When the switching signal is in a first state, the switching unit connects the (2i−1)th input terminal and the (2i−1)th output terminal, and connects the 2ith input terminal and the 2ith output terminal. When the switching signal is in a second state, the switching unit connects the 2ith input terminal and the (2i−1)th output terminal, and connects the (2i−1)th input terminal and the 2ith output terminal.
Abstract:
A display driving apparatus and a multi-line inversion driving method thereof are provided. The apparatus includes a gate driver, a source driver, a gate enabling unit and a line polarity signal unit. Every time after a plurality of scan lines is turned on, the source driver inverts the polarity of the sub pixel driving signal according to a line polarity signal output by the line polarity signal unit. Thereby, the polarity inversion operating frequency of the sub pixel driving signal is lowered to reduce the power consumption of the source driver.
Abstract:
A display system generates a plurality of sampling signals each having distinct phases based on external clock signals provided by a timing controller, latches data from external data signals provided by the timing controller based on the sampling signals, and sends the latched data to a decoder for determining a best sampling signal. Each driver of the display system generates driving voltages based on a respective best sampling signal determined by a respective decoder.
Abstract:
A source driver having a structure of adjusting voltage with speed is suitable for use in a panel displaying apparatus for driving a display array unit. The structure of adjusting voltage with speed has a logic speed monitoring unit, an internal logic voltage generator, a substrate voltage generator, a substrate leakage-current monitoring unit, and a power management control unit. In this manner, by monitoring the logic operation speed of an internal logic circuit in the source driver, in accordance with the change of the operation frequency, the power is dynamically adjusted, so as to optimize a condition between the power consumption and the operation speed. And, in the standby mode, the power consumption is further reduced by adjusting the substrate voltage. Also and, according to the substrate leakage current of the source driver, the substrate voltage can also be adjusted.