DRIVING METHOD AND DISPLAY UTILIZING THE SAME
    31.
    发明申请
    DRIVING METHOD AND DISPLAY UTILIZING THE SAME 审中-公开
    驾驶方法和使用它的显示

    公开(公告)号:US20100128065A1

    公开(公告)日:2010-05-27

    申请号:US12395531

    申请日:2009-02-27

    Abstract: A display including a scan driver, a data driver, a first pixel, and a second pixel is disclosed. The scan driver provides a first scan signal and a second scan signal. The data driver provides a data signal. The first pixel receives the first scan signal and displays a first color. The second pixel receives the second scan signal and displays a second color. The frequency of the first scan signal and the frequency of the second scan signal relate to the first color and the second color.

    Abstract translation: 公开了一种包括扫描驱动器,数据驱动器,第一像素和第二像素的显示器。 扫描驱动器提供第一扫描信号和第二扫描信号。 数据驱动器提供数据信号。 第一像素接收第一扫描信号并显示第一颜色。 第二像素接收第二扫描信号并显示第二颜色。 第一扫描信号的频率和第二扫描信号的频率与第一颜色和第二颜色相关。

    On-chip circuitry for bus validation
    32.
    发明授权
    On-chip circuitry for bus validation 有权
    用于总线验证的片上电路

    公开(公告)号:US07610526B2

    公开(公告)日:2009-10-27

    申请号:US11041821

    申请日:2005-01-24

    CPC classification number: G01R31/31858

    Abstract: Systems, methodologies, media, and other embodiments associated with validating a bus are described. One exemplary system embodiment includes an integrated circuit operably connectable to a bus, the bus being connectable to an external device configured to drive one or more electrical signals onto the bus. The integrated circuit may comprise a first logic configured to receive a test sequence of electrical signals from the bus, a second logic configured to produce a check sequence of electrical signals related to the test sequence of electrical signals, and a compare logic operably connected to the first logic and the second logic. The compare logic may be configured to determine whether the bus is correctly transmitting data based, at least in part, on comparing the test sequence and the check sequence.

    Abstract translation: 描述了与验证总线相关联的系统,方法,介质和其他实施例。 一个示例性系统实施例包括可操作地连接到总线的集成电路,该总线可连接到被配置为将一个或多个电信号驱动到总线上的外部设备。 集成电路可以包括被配置为从总线接收电信号的测试序列的第一逻辑,被配置为产生与电信号的测试序列相关的电信号的检查序列的第二逻辑,以及可操作地连接到 第一逻辑和第二逻辑。 比较逻辑可以被配置为至少部分地基于比较测试序列和检查序列来确定总线是否正确地发送数据。

    WORDLINE DRIVER FOR DRAM AND DRIVING METHOD THEREOF
    33.
    发明申请
    WORDLINE DRIVER FOR DRAM AND DRIVING METHOD THEREOF 有权
    用于DRAM及其驱动方式的WORDLINE驱动程序

    公开(公告)号:US20090245011A1

    公开(公告)日:2009-10-01

    申请号:US12170877

    申请日:2008-07-10

    Applicant: Chih Jen Chen

    Inventor: Chih Jen Chen

    CPC classification number: G11C8/08 G11C5/145 G11C11/4085

    Abstract: A wordline driver for DRAM comprises a multiplexer, an inverter and a transistor switch. One end of the multiplexer is connected to a wordline charging voltage, and the other end is connected to an external voltage, wherein the external voltage is less than the wordline charging voltage, and initially the external voltage is outputted. The output end of the inverter is connected to the select line of the multiplexer, and the input end thereof is electrically connected to the output end of the multiplexer. One end of the transistor switch is connected to the input end of the inverter, and the other end thereof is connected to the word line.

    Abstract translation: 用于DRAM的字线驱动器包括多路复用器,反相器和晶体管开关。 多路复用器的一端连接到字线充电电压,另一端连接到外部电压,其中外部电压小于字线充电电压,最初输出外部电压。 逆变器的输出端连接到多路复用器的选择线,其输入端电连接到多路复用器的输出端。 晶体管开关的一端连接到逆变器的输入端,另一端连接到字线。

    OFF-CHIP DRIVER
    34.
    发明申请
    OFF-CHIP DRIVER 有权
    离线驱动器

    公开(公告)号:US20080278199A1

    公开(公告)日:2008-11-13

    申请号:US11829086

    申请日:2007-07-27

    Applicant: Chih-Jen Chen

    Inventor: Chih-Jen Chen

    CPC classification number: H03K19/018507

    Abstract: A driver includes a plurality of first PMOS transistors, a first resistor, a amplifier, a second PMOS transistor and a second resistor. The amplifier herein receives a reference voltage and outputs a regulating voltage. The above-mentioned reference voltage is produced in accordance with a band-gap reference voltage. Since the band-gap reference voltage is unlikely affected by a process variation, thus, the present invention is capable of providing an output current robust from process characteristic and the output current is more reliable to indicate a data signal.

    Abstract translation: 驱动器包括多个第一PMOS晶体管,第一电阻器,放大器,第二PMOS晶体管和第二电阻器。 这里的放大器接收参考电压并输出调节电压。 上述参考电压根据带隙基准电压产生。 由于带隙参考电压不太可能受到工艺变化的影响,因此本发明能够提供从工艺特性得到鲁棒的输出电流,并且输出电流更可靠以指示数据信号。

    Process for fabricating heat sink with high-density fins
    35.
    发明授权
    Process for fabricating heat sink with high-density fins 失效
    用高密度散热片制造散热片的工艺

    公开(公告)号:US06665933B2

    公开(公告)日:2003-12-23

    申请号:US10011005

    申请日:2001-11-30

    Abstract: A process for fabricating a heat sink with high-density parallel fins is provided. The process includes steps of providing a metal block including a first base and a second base, the first base being rectangular-solid shaped, the second base being rhombus-shaped and disposed over the first base wherein the second base includes a first edge surface and a second edge surface inclined at a specific angle, cutting the second base from a position on the top surface of the second base and parallel with the first edge surface until the first base is reached, thereby forming an inclined sheet, adjusting the inclined sheet to be normal to the top surface of the first base, thereby forming a fin, and repeating the cutting step and the adjusting step to produce the heat sink with high-density parallel fins.

    Abstract translation: 提供了一种制造具有高密度平行翅片的散热器的方法。 该方法包括提供包括第一基底和第二基底的金属块的步骤,第一基底是矩形固体形状,第二基底是菱形并设置在第一基底上,其中第二基底包括第一边缘表面和 第二边缘表面以特定角度倾斜,从第二基底的顶表面上的位置切割第二基底并平行于第一边缘表面直到第一基底到达,从而形成倾斜片材,将倾斜片材调整到 垂直于第一基座的顶表面,从而形成翅片,并且重复切割步骤和调节步骤,以产生具有高密度平行翅片的散热器。

    Method for determining fluid flow characteristic curves of heat-dissipating system

    公开(公告)号:US06532423B2

    公开(公告)日:2003-03-11

    申请号:US09777489

    申请日:2001-02-05

    Abstract: A method for determining a plurality of fluid flow characteristic curves of a heat-dissipating system, wherein each fluid flow characteristic curve is a relationship curve of one of an air pressure and an air flow and the air pressure and a rotating speed of the heat-dissipating system. The method includes steps of (a) determining a first fluid characteristic curve of the heat-dissipating system at a first condition, (b) obtaining a first variable and a second variable according to the first fluid characteristic curve, (c) calculating relative values of the air pressure, the air flow, the first variable and the second variable for obtaining a plurality of coefficients of a specific equation, (d) determining a third variable and a fourth variable of the heat-dissipating system at a second condition, and (e) replacing the first variable and the second variable of the specific equation with the third variable and the fourth variable respectively for obtaining a second fluid characteristic curve of the heat-dissipating system at the second condition.

    Cleaning equipment
    37.
    发明授权
    Cleaning equipment 失效
    清洁设备

    公开(公告)号:US5988912A

    公开(公告)日:1999-11-23

    申请号:US113973

    申请日:1998-07-13

    Applicant: Chih-Jen Chen

    Inventor: Chih-Jen Chen

    CPC classification number: A46B11/066 B01F5/0496

    Abstract: A cleaning equipment includes a brush head having a body portion formed with a dovetail groove at an opposite side thereof and a plurality of holes close to one side of the dovetail groove, an adapter having a tubular member formed with an axial outlet which is connected with a sectorial member, and a tubular handle provided with a valve assembly and a container engaged with the valve assembly, whereby the cleaning equipment can automatically dispense a mixture of water and liquid detergent as desired.

    Abstract translation: 清洁设备包括:刷头,其具有在其相对侧形成有燕尾槽的主体部分和靠近燕尾槽一侧的多个孔,适配器具有形成有轴向出口的管状部件,该管状部件与 一个扇形构件和一个带有阀组件和与该阀组件接合的容器的管状手柄,由此清洁设备可根据需要自动分配水和液体洗涤剂的混合物。

    VOLTAGE GENERATING SYSTEM AND MEMORY DEVICE USING THE SAME
    39.
    发明申请
    VOLTAGE GENERATING SYSTEM AND MEMORY DEVICE USING THE SAME 有权
    电压发生系统及其使用的存储器件

    公开(公告)号:US20140036611A1

    公开(公告)日:2014-02-06

    申请号:US13563312

    申请日:2012-07-31

    Applicant: Chih Jen CHEN

    Inventor: Chih Jen CHEN

    CPC classification number: G11C5/14 G11C5/145 G11C5/146

    Abstract: A voltage generating system and a memory device using the same are disclosed. The voltage generating system includes an internal voltage regulator, configured to supply a current to pull an internal supply voltage to a regulated level and maintain at the regulated level; and a substrate-bias controlled selector, configured to receive a regulator power-up mode signal, a regulating mode signal and a substrate-bias voltage of a substrate, and control the internal voltage regulator such that when the substrate-bias voltage is smaller than a predetermined voltage, the internal voltage regulator powers up and operates normally by respectively taking the regulator power-up mode signal and the regulating mode signal into consideration, and when the substrate-bias voltage is larger than or equal to the predetermined voltage, the internal voltage regulator is disabled. The predetermined voltage is smaller than or equal to a forward voltage of a p-n junction formed with the substrate.

    Abstract translation: 公开了一种电压产生系统和使用其的存储器件。 电压发生系统包括内部电压调节器,其被配置为提供电流以将内部电源电压拉至调节电平并保持在限制电平; 以及衬底偏置控制选择器,被配置为接收调节器上电模式信号,调节模式信号和衬底的衬底偏置电压,并且控制内部电压调节器,使得当衬底偏置电压小于 内部电压调节器通过分别考虑调节器上电模式信号和调节模式信号来正常启动并正常工作,并且当衬底偏置电压大于或等于预定电压时,内部稳压器内部 电压调节器禁用。 预定电压小于或等于与衬底形成的p-n结的正向电压。

    Voltage generator having pull-up circuit and pull-down circuit
    40.
    发明授权
    Voltage generator having pull-up circuit and pull-down circuit 有权
    具有上拉电路和下拉电路的电压发生器

    公开(公告)号:US08587273B2

    公开(公告)日:2013-11-19

    申请号:US13208344

    申请日:2011-08-12

    CPC classification number: G11C11/4074

    Abstract: A voltage generator includes a controllable voltage divider, a pull-up circuit and a first pull-down circuit. The controllable voltage divider is utilized for generating an output voltage at an output node of the controllable voltage divider according to a first reference voltage, a second reference voltage, and a control signal, wherein the second reference voltage is lower than the first reference voltage. The pull-up circuit is coupled to the output node of the controllable voltage divider and the first reference voltage, and is utilized for selectively connecting the first reference voltage to the output node of the controllable voltage divider. The first pull-down circuit is coupled to the output node of the controllable voltage divider and the second reference voltage, and is utilized for selectively connecting the second reference voltage to the output node of the controllable voltage divider.

    Abstract translation: 电压发生器包括可控分压器,上拉电路和第一下拉电路。 可控分压器用于根据第一参考电压,第二参考电压和控制信号在可控分压器的输出节点处产生输出电压,其中第二参考电压低于第一参考电压。 上拉电路耦合到可控分压器的输出节点和第一参考电压,并用于选择性地将第一参考电压连接到可控分压器的输出节点。 第一下拉电路耦合到可控分压器的输出节点和第二参考电压,并且用于选择性地将第二参考电压连接到可控分压器的输出节点。

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