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公开(公告)号：US20240071541A1
公开(公告)日：2024-02-29
申请号：US18503575
申请日：2023-11-07
Inventor： Xuehuan FENG , Yongqian LI
CPC classification number: G11C19/28 , G09G3/20 , G09G3/3266 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: transmit a first voltage signal to a leakage prevention input node; and transmit a second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are different. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.
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公开(公告)号：US11910680B2
公开(公告)日：2024-02-20
申请号：US16976839
申请日：2019-11-29
Inventor： Can Yuan , Yongqian Li , Meng Li , Zhidong Yuan , Dacheng Zhang , Lang Liu
IPC: H01L27/32 , H10K59/131 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K50/813 , H10K50/824 , H10K59/122 , H10K59/124 , H10K59/121 , H10K71/00
CPC classification number: H10K59/1315 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K50/813 , H10K50/824 , H10K59/122 , H10K59/124 , H10K59/1216 , H10K71/00 , G09G2300/0426
Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.
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公开(公告)号：US20240054925A1
公开(公告)日：2024-02-15
申请号：US17764992
申请日：2021-05-28
Inventor： Xiaolong WEI , Fei YANG , Song MENG , Jingbo XU , Jianbo XIAN
IPC: G09G3/00 , G09G3/3233
CPC classification number: G09G3/006 , G09G3/3233 , G09G2300/0842
Abstract: A method for sensing a display panel includes: sensing an electrical characteristic parameter of a driving transistor of a pixel circuit of a sub-pixel in an X-th row in a blank stage between an N-th frame and an (N+1)-th frame, wherein X is a random number, and both N and X are positive integers.
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公开(公告)号：US11887683B2
公开(公告)日：2024-01-30
申请号：US17417518
申请日：2020-12-29
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan , Wenchao Bao
IPC: G11C19/28 , G09G3/3266
CPC classification number: G11C19/28 , G09G3/3266 , G09G2310/0286
Abstract: The present disclosure provides a shift register unit, a driving method, a gate driving circuit and a display device. The shift register unit includes a pull-down node control circuit; the pull-down node control circuit is electrically connected to an input terminal, a reset terminal, a first voltage terminal, a second voltage terminal and a pull-down node, respectively, and is configured to, under the control of an input signal provided by the input terminal and a reset signal provided by the reset terminal, control the pull-down node to be electrically conducted to the first voltage terminal or the second voltage terminal, and control to hold a potential of the pull-down node.
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公开(公告)号：US11875750B2
公开(公告)日：2024-01-16
申请号：US17635471
申请日：2020-12-26
Inventor： Zhidong Yuan , Pan Xu , Can Yuan , Yongqian Li , Zhongyuan Wu
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/3233 , G11C19/287 , G09G2300/0819 , G09G2300/0852 , G09G2310/0286 , G09G2310/08
Abstract: An array substrate includes: a substrate, at least one gate driving circuit and at least one clock signal line that are located on a same side of the substrate. The gate driving circuit includes a plurality of cascaded shift registers located in different rows, the plurality of shift registers are divided into at least two groups of shift registers, each group of shift registers includes at least one shift register, located in a same column. A gate driving circuit in the at least one gate driving circuit corresponds to at least one clock signal line. The clock signal line includes a main body transmission section configured to transmit a clock signal, and at least two branch transmission sections connected to the main body transmission section. Each branch transmission section is connected to a clock signal input terminal of each shift register in a respective group of shift registers.
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Patent Agency Ranking
公开(公告)号：US11844253B2
公开(公告)日：2023-12-12
申请号：US17922456
申请日：2021-11-19
Inventor： Xuehuan Feng , Yongqian Li
IPC: H10K59/131 , H10K59/126 , H10K59/80 , G09G3/3266 , G11C19/28
CPC classification number: H10K59/131 , G09G3/3266 , G11C19/287 , H10K59/126 , H10K59/8794 , G09G2300/0426 , G09G2310/0286
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a gate driving circuit including a first transistor; a base substrate; a functional layer located on a side of the base substrate, a material of the functional layer is a thermal conductive material, and the functional layer includes a first functional portion; an active layer located on a side of the functional layer away from the base substrate, the active layer includes a first active portion including at least one first active sub-portion which is configured to form a channel region of the first transistor; a second conductive layer located on a side of the active layer away from the base substrate, the second conductive layer includes a first conductive portion connected to the first functional portion through a first via hole.
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公开(公告)号：US11694628B2
公开(公告)日：2023-07-04
申请号：US17661463
申请日：2022-04-29
Inventor： Xuehuan Feng , Sixiang Wu
IPC: G09G3/3266 , G11C19/28
CPC classification number: G09G3/3266 , G11C19/28 , G09G2310/0286 , G09G2310/061
Abstract: A shift register unit, a driving method thereof, and a gate driving circuit are disclosed. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.
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38.发明授权公开(公告)号：US11690267B2
公开(公告)日：2023-06-27
申请号：US17251837
申请日：2020-05-13
Inventor： Wenbin Jia
IPC: H01L27/32 , H10K59/173 , H10K59/122 , H10K71/00 , H10K59/12
CPC classification number: H10K59/173 , H10K59/122 , H10K71/00 , H10K59/1201
Abstract: The present disclosure provides a defining solution for preparing a pixel defining layer configured to define individual pixels on a substrate, comprising: a lyophilic material, a lyophobic material and an initiator, wherein the lyophobic material comprises: a first lyophobic material and a second lyophobic material, and wherein a mass average molecular weight of the first lyophobic material is greater than a mass average molecular weight of the second lyophobic material, and a mass average molecular weight of the lyophilic material is greater than the mass average molecular weight of the first lyophobic material. The present disclosure further provides a display panel, a display apparatus and a method of preparing a pixel defining layer.
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39.发明授权公开(公告)号：US11676541B2
公开(公告)日：2023-06-13
申请号：US17264050
申请日：2020-06-12
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/32 , G09G3/3266 , G09G3/3225 , G11C19/28 , G09G3/36
CPC classification number: G09G3/3266 , G09G3/3225 , G11C19/28 , G09G3/3674 , G09G2300/0426 , G09G2300/0842 , G09G2310/0286 , G09G2310/08 , G09G2320/0233
Abstract: The present disclosure provides a shift resister unit, a gate driving circuit, a display device, and a method for controlling a shift register unit. The shift register unit incudes a first input sub-circuit, a first output sub-circuit, a first reset sub-circuit, a second input sub-circuit, and a third input sub-circuit. The first input sub-circuit is configured to change a potential of a first node in a first phase. The first output sub-circuit is configured to output a gate driving signal in the first phase and output a compensation driving signal in a second phase. The first reset sub-circuit is configured to reset the first node. The second input sub-circuit is configured to change a potential of a second node in the first phase and maintain the potential of the second node. The third input sub-circuit is configured to change the potential of the first node in the second phase.
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公开(公告)号：US20230178014A1
公开(公告)日：2023-06-08
申请号：US17921911
申请日：2021-06-03
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/3225
CPC classification number: G09G3/3225 , G09G2300/0842 , G09G2320/0233
Abstract: A display substrate (100) and a design method therefor, and a display apparatus. The display substrate (100) includes: pixel circuits which are arranged in an array, where the pixel circuits are divided into at least two areas; and data switching circuits (10), which are correspondingly connected to the pixel circuits in the areas by means of data signal lines, wherein a channel width-to-length ratio (W/L) of a switch device in each data switching circuit (10) is positively correlated with a design data load of an area corresponding to the data switching circuit (10). The width-to-length ratios (W/L) of different switch devices can be matched according to different design data loads of different areas.
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