公开(公告)号：US07793130B2

公开(公告)日：2010-09-07

申请号：US11789721

申请日：2007-04-24

Applicant: Shih-Hsien Yang ,  Chung-Hsing Wang ,  Lee-Chung Lu ,  Chun-Hui Tai ,  Cliff Hou

Inventor： Shih-Hsien Yang ,  Chung-Hsing Wang ,  Lee-Chung Lu ,  Chun-Hui Tai ,  Cliff Hou

IPC: G06F1/26

CPC classification number: G06F1/3203

Abstract: System and method for providing power to integrated circuitry with good power-on responsive time and reduced power-on transient glitches. A preferred embodiment comprises a daughter switch coupled to a circuit block, a first control circuit coupled to the daughter circuit, a second control circuit coupled to the first control circuit, and a mother circuit coupled to the circuit block and to the second control circuit. After the daughter switch is turned on by a control signal, the mother switch is not turned on until the daughter switch has discharged (charged) the voltage potential across power rails of the mother circuit to a point where glitches are minimized. The second control circuit turns on the mother circuit when the reduced voltage potential is reached, with a signal produced by the first control circuit reflects the voltage potential. Furthermore, a bypass circuit can be used to reduce leakage current.

Abstract translation: 为集成电路提供电源的系统和方法具有良好的上电响应时间和减少的上电瞬态毛刺。 优选实施例包括耦合到电路块的子开关，耦合到子电路的第一控制电路，耦合到第一控制电路的第二控制电路和耦合到电路块和第二控制电路的母电路。 在通过控制信号接通子开关之后，母开关直到子开关已经将母电路的电源轨上的电压放电（充电）到毛刺最小化的位置为止。 当达到降低的电压电位时，第二控制电路接通母电路，由第一控制电路产生的信号反映电压电位。 此外，可以使用旁路电路来减少泄漏电流。

公开(公告)号：US20090315079A1

公开(公告)日：2009-12-24

申请号：US12193354

申请日：2008-08-18

Applicant: Li-Chun Tien ,  Lee-Chung Lu ,  Yung-Chin Hou ,  Chun-Hui Tai ,  Ta-Pen Guo ,  Sheng-Hsin Chen ,  Ping Chung Li

Inventor： Li-Chun Tien ,  Lee-Chung Lu ,  Yung-Chin Hou ,  Chun-Hui Tai ,  Ta-Pen Guo ,  Sheng-Hsin Chen ,  Ping Chung Li

IPC: H01L21/8238

CPC classification number: H01L27/092 ,  H01L27/0207

Abstract: An integrated circuit structure includes an integrated circuit structure including a PMOS transistor including a first gate electrode; a first source region; and a first drain region; an NMOS transistor including a second gate electrode, wherein the first gate electrode and the second gate electrode are portions of a gate electrode strip; a second source region; and a second drain region. No additional transistors are formed between the PMOS transistor and the NMOS transistor. The integrated circuit further includes a VDD power rail connected to the first source region; a VSS power rail connected to the second source region; and an interconnection port electrically connected to the gate electrode strip. The interconnection port is on an outer side of a MOS pair region including the PMOS transistor, the NMOS transistor, and the region between the PMOS transistor and the NMOS transistor. The portion of the gate electrode strip in the MOS pair region is substantially straight.

Abstract translation: 集成电路结构包括集成电路结构，其包括：包括第一栅电极的PMOS晶体管; 第一源区; 和第一漏区; 包括第二栅电极的NMOS晶体管，其中所述第一栅电极和所述第二栅电极是栅电极条的部分; 第二源区; 和第二漏区。 在PMOS晶体管和NMOS晶体管之间不会形成附加的晶体管。 集成电路还包括连接到第一源极区的VDD电源轨; 连接到第二源区的VSS电力轨; 以及电连接到栅电极条的互连端口。 互连端口位于包括PMOS晶体管，NMOS晶体管以及PMOS晶体管和NMOS晶体管之间的区域的MOS对区域的外侧。 MOS对区域中的栅电极条的部分基本上是直的。

公开(公告)号：US20050183510A1

公开(公告)日：2005-08-25

申请号：US10782036

申请日：2004-02-19

Applicant: Ruei-Hung Jang ,  Chih-Lin Ying ,  Tsung-Chi Hsieh ,  Sheng-Liang Pan ,  Ching-Hui Tai

Inventor： Ruei-Hung Jang ,  Chih-Lin Ying ,  Tsung-Chi Hsieh ,  Sheng-Liang Pan ,  Ching-Hui Tai

IPC: G01L1/00 ,  G01L5/00 ,  G01L5/22 ,  G01L7/00

CPC classification number: G01L5/0033 ,  G01L5/226

Abstract: A method and apparatus for measuring the vacuum gripping strength of a vacuum wand or robotic arm provides a pressure gauge and a conduit extending from the pressure gauge and terminating at an opening formed in a receiving surface. A vacuum wand head is positioned on the receiving surface such that the gripping surface of the vacuum wand forms a conterminous boundary with the receiving surface and the vacuum port of the vacuum wand is aligned over the opening formed in the receiving surface. The receiving surface replicates a wafer surface so that the same vacuum gripping strength as would be delivered to a wafer being gripped by the vacuum wand, is thereby sensed by the pressure gauge. Spring loaded positioning members act in conjunction with a clamp member and a mechanical stop position the vacuum wand head in the receiving area and over the opening and also to assure that the gripping surface of the vacuum wand head is flush against the surface of the receiving area. Diminution of vacuum gripping strength caused by scratches or other defects of the gripping surface that cause vacuum leaks between gripping surface and the wafer surface, are similarly reproduced and sensed by the pressure gauge.

公开(公告)号：US20050047161A1

公开(公告)日：2005-03-03

申请号：US10647324

申请日：2003-08-26

Applicant: Mei-Hui Tai

Inventor： Mei-Hui Tai

IPC: B62J6/20 ,  B60Q1/00

CPC classification number: B62J6/20 ,  B60Q1/326

Abstract: A centrifugal force-activated signal light assembly for use in a vehicle is disclosed in which a metal weight is suspended from a metal conical spring at the bottom side of a set of battery cells inside a metal casing and vibrated to touch the metal casing intermittently upon running of the vehicle wheel in which the assembly is installed, causing the LED to flash.

Abstract translation: 公开了一种用于车辆的离心力激励信号灯组件，其中金属重物从金属壳体内的一组电池单元的底侧的金属锥形弹簧悬挂，并且振动以间断地接触金属壳体 运行安装组件的车轮，导致LED闪烁。