System and method for message delivery across a plurality of processors
    31.
    发明授权
    System and method for message delivery across a plurality of processors 失效
    用于跨多个处理器的消息传递的系统和方法

    公开(公告)号:US07240137B2

    公开(公告)日:2007-07-03

    申请号:US10926592

    申请日:2004-08-26

    CPC classification number: G06F9/4812 G06F9/52

    Abstract: A system and method is provided to deliver messages to processors operating in a multi-processing environment. In a multi-processor environment, interrupts are managed by storing events in a queue that correspond to a particular support processor. A main processor decodes an interrupt and determines which support processor generated the interrupt. The main processor then determines whether a kernel or an application should process the interrupt. Interrupts such as page faults, segment faults, and alignment errors are handled by the kernel, while “informational” signals, such as stop and signal requests, halt requests, mailbox requests, and DMC tag complete requests are handled by the application. In addition, multiple identical events are maintained, and event data may be included in the interrupt using the invention described herein.

    Abstract translation: 提供了一种系统和方法,用于将消息传递到在多处理环境中操作的处理器。 在多处理器环境中,通过将事件存储在与特定支持处理器对应的队列中来管理中断。 主处理器解码中断并确定哪个支持处理器产生中断。 然后,主处理器确定内核或应用程序是否应该处理中断。 内核处理诸如页面错误,段错误和对齐错误等中断,应用程序会处理“信息”信号,如停止和信号请求,暂停请求,邮箱请求和DMC标签完成请求。 另外,维护多个相同的事件,并且可以使用本文所述的发明将事件数据包括在中断中。

    System and method for light weight task switching when a shared memory condition is signaled
    32.
    发明申请
    System and method for light weight task switching when a shared memory condition is signaled 审中-公开
    当共享内存条件发出信号时,用于轻量级任务切换的系统和方法

    公开(公告)号:US20070043916A1

    公开(公告)日:2007-02-22

    申请号:US11204424

    申请日:2005-08-16

    CPC classification number: G06F12/0842 G06F9/526

    Abstract: A system and method for using a handler to detect asynchronous lock line reservation lost events, and switching tasks based upon whether a condition is true or a mutex lock is acquired is presented. A synergistic processing unit (SPU) invokes a first thread and, during execution, the first thread requests external data that is shared with other threads or processors in the system. This shared data may be protected with a mutex lock or other shared memory synchronization constructs. When requested data is not available, the SPU switches to a second thread and monitors lock line reservation lost events in order to check when the data is available. When the data is available, the SPU switches back to the first thread and processes the first thread's request.

    Abstract translation: 提出了一种使用处理程序来检测异步锁定线路保留丢失事件的系统和方法,以及基于条件为真还是获取互斥锁来切换任务。 协同处理单元(SPU)调用第一个线程,并且在执行期间,第一个线程请求与系统中的其他线程或处理器共享的外部数据。 该共享数据可以用互斥锁或其他共享内存同步结构来保护。 当请求的数据不可用时,SPU切换到第二个线程并监视锁定线路保留丢失事件,以便检查数据可用时间。 当数据可用时,SPU切换回第一个线程并处理第一个线程的请求。

    System and method for a software managed cache in a multiprocessing environment
    33.
    发明授权
    System and method for a software managed cache in a multiprocessing environment 有权
    多处理环境中软件管理缓存的系统和方法

    公开(公告)号:US08868844B2

    公开(公告)日:2014-10-21

    申请号:US12145551

    申请日:2008-06-25

    CPC classification number: G06F12/0875

    Abstract: A method for implementing a software-managed cache comprises determining an object identifier (ID) for each of a first set of objects of a plurality of objects resident in a local memory, to generate a first cache table, the first cache table comprising a plurality of entries. Each object comprises an object ID and an effective address. The method receives a request for an object, the request comprising an object ID. The method compares the received object ID with the entries in the first cache table. In the event the received object ID matches an entry in the first cache table, the method returns the matching entry in response to the request. In the event the received object ID does not match an entry in the first cache table, the method calculates an effective address in the local memory of the object associated with the object ID.

    Abstract translation: 用于实现软件管理的高速缓存的方法包括为驻留在本地存储器中的多个对象的第一组对象中的每一个确定对象标识符(ID),以生成第一高速缓存表,所述第一高速缓存表包括多个 的条目。 每个对象包括对象ID和有效地址。 该方法接收对象的请求,该请求包括对象ID。 该方法将接收的对象ID与第一高速缓存表中的条目进行比较。 在接收到的对象ID与第一高速缓存表中的条目匹配的情况下,该方法响应于该请求返回匹配的条目。 在接收到的对象ID与第一高速缓存表中的条目不匹配的情况下,该方法计算与对象ID相关联的对象的本地存储器中的有效地址。

    Processor dedicated code handling in a multi-processor environment
    34.
    发明授权
    Processor dedicated code handling in a multi-processor environment 有权
    处理器专用代码处理在多处理器环境中

    公开(公告)号:US08219981B2

    公开(公告)日:2012-07-10

    申请号:US12173093

    申请日:2008-07-15

    CPC classification number: G06F9/5044 G06F2209/509

    Abstract: Code handling, such as interpreting language instructions or performing “just-in-time” compilation, is performed using a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perform a dedicated code-handling task, such as perform just-in-time compilation or interpretation of interpreted language instructions, such as Java. The other processors request code handling processing that is performed by the dedicated processor. Speed is achieved using a shared memory map so that the dedicated processor can quickly retrieve data provided by one of the other processors.

    Abstract translation: 使用共享公共存储器的异构处理环境来执行诸如解释语言指令或执行“即时”编译的代码处理。 在包括多个处理器的异构处理环境中,处理器之一被编程为执行专用代码处理任务,例如执行诸如Java的解释性语言指令的即时编译或解释。 其他处理器请求由专用处理器执行的代码处理处理。 使用共享存储器映射实现速度,使得专用处理器可以快速检索由其他处理器之一提供的数据。

    Managing position independent code using a software framework
    35.
    发明授权
    Managing position independent code using a software framework 有权
    使用软件框架管理位置独立代码

    公开(公告)号:US08126957B2

    公开(公告)日:2012-02-28

    申请号:US12049202

    申请日:2008-03-14

    CPC classification number: G06F9/44526

    Abstract: An approach for managing position independent code using a software framework is presented. A software framework provides the ability to cache multiple plug-in's which are loaded in a processor's local storage. A processor receives a command or data stream from another processor, which includes information corresponding to a particular plug-in. The processor uses the plug-in identifier to load the plug-in from shared memory into local memory before it is required in order to minimize latency. When the data stream requests the processor to use the plug-in, the processor retrieves a location offset corresponding to the plug-in and applies the plug-in to the data stream. A plug-in manager manages an entry point table that identifies memory locations corresponding to each plug-in and, therefore, plug-ins may be placed anywhere in a processor's local memory.

    Abstract translation: 提出了一种使用软件框架管理与位置无关的代码的方法。 软件框架提供了缓存加载在处理器本地存储中的多个插件的能力。 处理器从另一处理器接收命令或数据流,其包括对应于特定插件的信息。 处理器使用插件标识符在必需之前将插件从共享内存加载到本地内存中,以便最小化延迟。 当数据流请求处理器使用插件时,处理器检索对应于插件的位置偏移并将插件应用于数据流。 插件管理器管理一个入口点表,用于标识与每个插件相对应的存储位置,因此插件可以放置在处理器的本地存储器中的任何位置。

    System and method for securely saving a program context to a shared memory
    36.
    发明授权
    System and method for securely saving a program context to a shared memory 有权
    用于将程序上下文安全地保存到共享存储器的系统和方法

    公开(公告)号:US08095802B2

    公开(公告)日:2012-01-10

    申请号:US11530937

    申请日:2006-09-12

    CPC classification number: G06F21/71 G06F21/52 G06F2221/2105

    Abstract: A system, method and program product for securely saving a program context to a shared memory is presented. A secured program running on an special purpose processor core running in isolation mode is interrupted. The isolated special purpose processor core is included in a heterogeneous processing environment, that includes purpose processors and general purpose processor cores that each access a shared memory. In isolation mode, the special purpose processor core's local memory is inaccessible from the other heterogeneous processors. The secured program's context is securely saved to the shared memory using a random persistent security data. The lines of code stored in the isolated special purpose processor core's local memory are read along with data values, such as register settings, set by the secured program. The lines of code and data values are encrypted using the persistent security data, and the encrypted code lines and data values are stored in the shared memory.

    Abstract translation: 提出了一种用于将程序上下文安全地保存到共享存储器的系统,方法和程序产品。 在隔离模式下运行的专用处理器核心上运行的安全程序被中断。 独立的专用处理器核心包含在异构处理环境中,其中包括各自访问共享内存的目标处理器和通用处理器内核。 在隔离模式下,专用处理器核心的本地内存无法从其他异构处理器访问。 使用随机持久的安全性数据将安全程序的上下文安全地保存到共享内存中。 存储在隔离专用处理器核心的本地存储器中的代码行与安全程序设置的数据值(如寄存器设置)一起读取。 使用持久的安全数据对代码和数据值的行进行加密,并将加密的代码行和数据值存储在共享存储器中。

    SPE Software Instruction Cache
    37.
    发明申请
    SPE Software Instruction Cache 有权
    SPE软件指令缓存

    公开(公告)号:US20110161641A1

    公开(公告)日:2011-06-30

    申请号:US12648741

    申请日:2009-12-29

    CPC classification number: G06F9/3804 G06F9/30047 G06F12/0875

    Abstract: An application thread executes a direct branch instruction that is stored in an instruction cache line. Upon execution, the direct branch instruction branches to a branch descriptor that is also stored in the instruction cache line. The branch descriptor includes a trampoline branch instruction and a target instruction space address. Next, the trampoline branch instruction sends a branch descriptor pointer, which points to the branch descriptor, to an instruction cache manager. The instruction cache manager extracts the target instruction space address from the branch descriptor, and executes a target instruction corresponding to the target instruction space address. In one embodiment, the instruction cache manager generates a target local store address by masking off a portion of bits included in the target instruction space address. In turn, the application thread executes the target instruction located at the target local store address accordingly.

    Abstract translation: 应用程序线程执行存储在指令高速缓存行中的直接转移指令。 在执行时,直接分支指令分支到也存储在指令高速缓存行中的分支描述符。 分支描述符包括蹦床分支指令和目标指令空间地址。 接下来,蹦床分支指令将指向分支描述符的分支描述符指针发送到指令高速缓存管理器。 指令高速缓存管理器从分支描述符中提取目标指令空间地址,并且执行与目标指令空间地址相对应的目标指令。 在一个实施例中,指令高速缓存管理器通过掩蔽包含在目标指令空间地址中的位的一部分来生成目标本地存储地址。 反过来,应用程序线程相应地执行位于目标本地存储地址的目标指令。

    Managing a plurality of processors as devices
    38.
    发明授权
    Managing a plurality of processors as devices 有权
    将多个处理器作为设备进行管理

    公开(公告)号:US07921151B2

    公开(公告)日:2011-04-05

    申请号:US12176375

    申请日:2008-07-19

    CPC classification number: G06F9/5027 G06F2209/509

    Abstract: A computer system's multiple processors are managed as devices. The operating system accesses the multiple processors using processor device modules loaded into the operating system to facilitate a communication between an application requesting access to a processor and the processor. A device-like access is determined for accessing each one of the processors similar to device-like access for other devices in the system such as disk drives, printers, etc. An application seeking access to a processor issues device-oriented instructions for processing data, and in addition, the application provides the processor with the data to be processed. The processor processes the data according to the instructions provided by the application.

    Abstract translation: 计算机系统的多个处理器作为设备进行管理。 操作系统使用加载到操作系统中的处理器设备模块来访问多个处理器,以便于请求对处理器的访问的应用与处理器之间的通信。 确定用于访问每个处理器的类似设备的访问,类似于系统中的其他设备(例如磁盘驱动器,打印机等)的类似设备的访问。寻求对处理器的访问的应用发出面向设备的指令以处理数据 ,此外,应用程序向处理器提供要处理的数据。 处理器根据应用程序提供的指令对数据进行处理。

    Selection of processor cores for optimal thermal performance
    39.
    发明授权
    Selection of processor cores for optimal thermal performance 有权
    选择处理器内核以获得最佳的热性能

    公开(公告)号:US07596430B2

    公开(公告)日:2009-09-29

    申请号:US11381391

    申请日:2006-05-03

    CPC classification number: G06F1/206

    Abstract: A computer implemented method, data processing system, computer usable code, and apparatus are provided for optimizing the thermal performance of a computer system. A set of processor cores associated with the computer system are identified. A thermal index is requested for each of the set of processor cores and the processor cores are ranked based on the thermal index. Software is then mapped to execute on an optimal processor core form the set of processor cores based on the ranking.

    Abstract translation: 提供计算机实现的方法,数据处理系统,计算机可用代码和装置,用于优化计算机系统的热性能。 识别与计算机系统相关联的一组处理器核心。 要求每组处理器核心的热指数,并且基于热指数对处理器核心进行排名。 然后将软件映射到基于排名的一组处理器核心的最佳处理器核心上执行。

    Managing a plurality of processors as devices
    40.
    发明授权
    Managing a plurality of processors as devices 有权
    将多个处理器作为设备进行管理

    公开(公告)号:US07523157B2

    公开(公告)日:2009-04-21

    申请号:US10670823

    申请日:2003-09-25

    CPC classification number: G06F9/5027 G06F2209/509

    Abstract: Managing a computer system's multiple processors as devices. The operating system accesses the multiple processors using processor device modules loaded into the operating system to facilitate a communication between an application requesting access to a processor and the processor. A device-like access is determined for accessing each one of the processors similar to device-like access for other devices in the system such as disk drives, printers, etc. An application seeking access to a processor issues device-oriented instructions for processing data, and in addition, the application provides the processor with the data to be processed. The processor processes the data according to the instructions provided by the application.

    Abstract translation: 管理计算机系统的多个处理器作为设备。 操作系统使用加载到操作系统中的处理器设备模块来访问多个处理器,以便于请求对处理器的访问的应用与处理器之间的通信。 确定用于访问每个处理器的类似设备的访问,类似于系统中的其他设备(例如磁盘驱动器,打印机等)的类似设备的访问。寻求对处理器的访问的应用发出面向设备的指令以处理数据 ,此外,应用程序向处理器提供要处理的数据。 处理器根据应用程序提供的指令对数据进行处理。

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