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    Loading Software on a Plurality of Processors
    1.
    发明申请
    Loading Software on a Plurality of Processors 失效
    在多个处理器上加载软件

    公开(公告)号：US20080235679A1

    公开(公告)日：2008-09-25

    申请号：US12131348

    申请日：2008-06-02

    申请人： Maximino Aguilar ,  Alex Chunghen Chow ,  Michael Norman Day ,  Michael Stan Gowen ,  Mark Richard Nutter ,  James Xenidis

    发明人： Maximino Aguilar ,  Alex Chunghen Chow ,  Michael Norman Day ,  Michael Stan Gowen ,  Mark Richard Nutter ,  James Xenidis

    IPC分类号： G06F9/445

    CPC分类号： G06F9/44557 ,  G06F9/44526

    摘要： Loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.

    摘要翻译： 在多个处理器上加载软件。 处理单元（PU）从系统存储器检索文件并将其加载到其内部存储器中。 PU从文件头中提取一种处理器类型，用于标识文件是否应在PU或协同处理单元（SPU）上执行。 如果SPU应该执行该文件，PU DMA将该文件提交给SPU执行。 在一个实施例中，该文件是包括PU和SPU代码的组合文件。 在该实施例中，PU识别包括在文件中的一个或多个区段标题，其指示组合文件内的嵌入式SPU代码。 在本实施例中，PU从组合文件中提取SPU代码，并将提取的代码DMA提取给SPU以执行。

    Grouping processors and assigning shared memory space to a group in a heterogeneous computer environment
    2.
    发明申请
    Grouping processors and assigning shared memory space to a group in a heterogeneous computer environment 有权
    将处理器分组并将共享内存空间分配给异构计算机环境中的组

    公开(公告)号：US20080155203A1

    公开(公告)日：2008-06-26

    申请号：US12042254

    申请日：2008-03-04

    申请人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter ,  James Xenidis

    发明人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter ,  James Xenidis

    IPC分类号： G06F12/00

    CPC分类号： G06F9/5061 ,  G06F2209/5012

    摘要： Grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.

    摘要翻译： 介绍了分组处理器。 处理单元（PU）启动应用程序并识别应用程序的要求。 PU以组的形式向应用分配一个或多个协同处理单元（SPU）和存储器空间。 应用程序指定任务是否需要共享内存或专用内存。 共享内存是可由SPU和PU访问的内存空间。 然而，专用内存是只能由组中包含的SPU访问的内存空间。 当应用程序执行时，组内的资源被分配给应用程序的执行线程。 每个组都有自己的组属性，如地址空间，策略（即实时，FIFO，运行完成等）和优先级（即低或高）。 在线程执行期间使用这些组属性来确定哪些组优先于其他任务。

    Light Weight Task Switching When a Shared Memory Condition is Signaled
    3.
    发明申请
    Light Weight Task Switching When a Shared Memory Condition is Signaled 失效
    当共享内存条件发出信号时，轻量级任务切换

    公开(公告)号：US20080163241A1

    公开(公告)日：2008-07-03

    申请号：US12049317

    申请日：2008-03-15

    申请人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    发明人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    IPC分类号： G06F9/46 ,  G06F12/08 ,  G06F11/30

    CPC分类号： G06F12/0842 ,  G06F9/526

    摘要： An approach that uses a handler to detect asynchronous lock line reservation lost events, and switching tasks based upon whether a condition is true or a mutex lock is acquired is presented. A synergistic processing unit (SPU) invokes a first thread and, during execution, the first thread requests external data that is shared with other threads or processors in the system. This shared data may be protected with a mutex lock or other shared memory synchronization constructs. When requested data is not available, the SPU switches to a second thread and monitors lock line reservation lost events in order to check when the data is available. When the data is available, the SPU switches back to the first thread and processes the first thread's request.

    摘要翻译： 提出了一种使用处理程序来检测异步锁定线路保留丢失事件的方法，以及基于条件是真实还是获取互斥锁来切换任务。 协同处理单元（SPU）调用第一个线程，并且在执行期间，第一个线程请求与系统中的其他线程或处理器共享的外部数据。 该共享数据可以用互斥锁或其他共享内存同步结构来保护。 当请求的数据不可用时，SPU切换到第二个线程并监视锁定线路保留丢失事件，以便检查数据可用时间。 当数据可用时，SPU切换回第一个线程并处理第一个线程的请求。

    Asynchronous Linked Data Structure Traversal
    4.
    发明申请
    Asynchronous Linked Data Structure Traversal 有权
    异步链接数据结构遍历

    公开(公告)号：US20080263091A1

    公开(公告)日：2008-10-23

    申请号：US12147540

    申请日：2008-06-27

    申请人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    发明人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    IPC分类号： G06F17/00

    CPC分类号： G06F17/30961 ,  Y10S707/99933 ,  Y10S707/99944 ,  Y10S707/99945

    摘要： Asynchronously traversing a disjoint linked data structure is presented. A synergistic processing unit (SPU) includes a handler that works in conjunction with a memory flow controller (MFC) to traverse a disjoint linked data structure. The handler compares a search value with a node value, and provides the MFC with an effective address of the next node to traverse based upon the comparison. In turn, the MFC retrieves the corresponding node data from system memory and stores the node data in the SPU's local storage area. The MFC stalls processing and sends an asynchronous event interrupt to the SPU which, as a result, instructs the handler to retrieve and compare the latest node data in the local storage area with the search value. The traversal continues until the handler matches the search value with a node value or until the handler determines a failed search.

    摘要翻译： 呈现异步遍历不相交的数据结构。 协同处理单元（SPU）包括与存储器流控制器（MFC）一起工作的处理程序，以遍历不相交的数据结构。 处理程序将搜索值与节点值进行比较，并根据比较为MFC提供下一个节点的有效地址进行遍历。 反过来，MFC从系统存储器检索相应的节点数据，并将节点数据存储在SPU的本地存储区域中。 MFC停止处理并向SPU发送异步事件中断，结果指示处理程序检索和比较本地存储区域中的最新节点数据与搜索值。 遍历继续，直到处理程序与搜索值与节点值匹配，或者直到处理程序确定失败的搜索。

    System and method for light weight task switching when a shared memory condition is signaled
    5.
    发明申请
    System and method for light weight task switching when a shared memory condition is signaled 审中-公开
    当共享内存条件发出信号时，用于轻量级任务切换的系统和方法

    公开(公告)号：US20070043916A1

    公开(公告)日：2007-02-22

    申请号：US11204424

    申请日：2005-08-16

    申请人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    发明人： Maximino Aguilar ,  Michael Norman Day ,  Mark Richard Nutter

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0842 ,  G06F9/526

    摘要： A system and method for using a handler to detect asynchronous lock line reservation lost events, and switching tasks based upon whether a condition is true or a mutex lock is acquired is presented. A synergistic processing unit (SPU) invokes a first thread and, during execution, the first thread requests external data that is shared with other threads or processors in the system. This shared data may be protected with a mutex lock or other shared memory synchronization constructs. When requested data is not available, the SPU switches to a second thread and monitors lock line reservation lost events in order to check when the data is available. When the data is available, the SPU switches back to the first thread and processes the first thread's request.

    摘要翻译： 提出了一种使用处理程序来检测异步锁定线路保留丢失事件的系统和方法，以及基于条件为真还是获取互斥锁来切换任务。 协同处理单元（SPU）调用第一个线程，并且在执行期间，第一个线程请求与系统中的其他线程或处理器共享的外部数据。 该共享数据可以用互斥锁或其他共享内存同步结构来保护。 当请求的数据不可用时，SPU切换到第二个线程并监视锁定线路保留丢失事件，以便检查数据可用时间。 当数据可用时，SPU切换回第一个线程并处理第一个线程的请求。

    Processor Dedicated Code Handling in a Multi-Processor Environment
    6.
    发明申请
    Processor Dedicated Code Handling in a Multi-Processor Environment 有权
    处理器专用代码处理在多处理器环境中

    公开(公告)号：US20080276232A1

    公开(公告)日：2008-11-06

    申请号：US12173093

    申请日：2008-07-15

    申请人： Maximino Aguilar ,  Mark Richard Nutter ,  James Michael Stafford

    发明人： Maximino Aguilar ,  Mark Richard Nutter ,  James Michael Stafford

    IPC分类号： G06F9/45

    CPC分类号： G06F9/5044 ,  G06F2209/509

    摘要： Code handling, such as interpreting language instructions or performing “just-in-time” compilation, is performed using a heterogeneous processing environment that shares a common memory. In a heterogeneous processing environment that includes a plurality of processors, one of the processors is programmed to perform a dedicated code-handling task, such as perform just-in-time compilation or interpretation of interpreted language instructions, such as Java. The other processors request code handling processing that is performed by the dedicated processor. Speed is achieved using a shared memory map so that the dedicated processor can quickly retrieve data provided by one of the other processors.

    摘要翻译： 使用共享公共存储器的异构处理环境来执行诸如解释语言指令或执行“即时”编译的代码处理。 在包括多个处理器的异构处理环境中，处理器之一被编程为执行专用代码处理任务，例如执行诸如Java的解释性语言指令的即时编译或解释。 其他处理器请求由专用处理器执行的代码处理处理。 使用共享存储器映射实现速度，使得专用处理器可以快速检索由其他处理器之一提供的数据。

    Using Performance Monitor to Optimize System Performance
    8.
    发明申请
    Using Performance Monitor to Optimize System Performance 审中-公开
    使用性能监视器优化系统性能

    公开(公告)号：US20080163240A1

    公开(公告)日：2008-07-03

    申请号：US12049285

    申请日：2008-03-15

    申请人： Maximino Aguilar ,  David John Erb ,  Sidney James Manning ,  James Michael Stafford

    发明人： Maximino Aguilar ,  David John Erb ,  Sidney James Manning ,  James Michael Stafford

    IPC分类号： G06F9/46

    CPC分类号： G06F9/4881 ,  G06F11/3409 ,  G06F2201/86 ,  G06F2209/483

    摘要： An approach that optimizes system performance using performance monitors is presented. The system gathers thread performance data using performance monitors for threads running on either a first ISA processor or a second ISA processor. Multiple first processors and multiple second processors may be included in a single computer system. The first processors and second processors can each access data stored in a common shared memory. The gathered thread performance data is analyzed to determine whether the corresponding thread needs additional CPU time in order to optimize system performance. If additional CPU time is needed, the amount of CPU time that the thread receives is altered (increased) so that the thread receives the additional time when it is scheduled by the scheduler. In one embodiment, the increased CPU time is accomplished by altering a priority value that corresponds to the thread.

    摘要翻译： 介绍了使用性能监视器优化系统性能的方法。 系统使用在第一个ISA处理器或第二个ISA处理器上运行的线程的性能监视器收集线程性能数据。 多个第一处理器和多个第二处理器可以包括在单个计算机系统中。 第一处理器和第二处理器可以各自访问存储在公共共享存储器中的数据。 分析收集的线程性能数据，以确定相应的线程是否需要额外的CPU时间，以优化系统性能。 如果需要额外的CPU时间，则线程接收的CPU时间量会被更改（增加），以便线程在调度程序调度时收到额外的时间。 在一个实施例中，通过改变对应于线程的优先级值来实现增加的CPU时间。

    System and method for improved software simulation using a plurality of simulator checkpoints
    10.
    发明申请
    System and method for improved software simulation using a plurality of simulator checkpoints 审中-公开
    使用多个模拟器检查点改进软件仿真的系统和方法

    公开(公告)号：US20060155525A1

    公开(公告)日：2006-07-13

    申请号：US11032182

    申请日：2005-01-10

    申请人： Maximino Aguilar ,  Patrick Bohrer ,  James Stafford

    发明人： Maximino Aguilar ,  Patrick Bohrer ,  James Stafford

    IPC分类号： G06F9/455

    CPC分类号： G06F17/5022

    摘要： A system and method is provided to improve software simulation. A software emulator is used in conjunction with a hardware simulator. A special snapshot instruction is included in the software code that is emulated. When the snapshot instruction is encountered, values such as register, memory, and program stack values, are stored creating an initial snapshot. Code continues to be emulated and, when the next snapshot instruction is encountered, the values are written to create a second snapshot. The initial values are used to set an initial state in a hardware model that is simulated on a hardware simulator. The results of the hardware simulation are compared to the second snapshot to uncover software errors and/or hardware errors so that the software can be modified or the hardware design can be modified. Multiple sets of snapshots can be taken to analyze multiple sections of the software program.

    摘要翻译： 提供了一种系统和方法来改进软件仿真。 软件仿真器与硬件模拟器结合使用。 特殊快照指令包含在仿真的软件代码中。 当遇到快照指令时，存储诸如寄存器，存储器和程序堆栈值的值，创建初始快照。 代码继续被仿真，并且当遇到下一个快照指令时，这些值被写入以创建第二个快照。 初始值用于在硬件模拟器上模拟的硬件模型中设置初始状态。 将硬件仿真的结果与第二个快照进行比较，以发现软件错误和/或硬件错误，从而可以修改软件或修改硬件设计。 可以采用多组快照来分析软件程序的多个部分。