Abstract:
An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
Abstract:
A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
Abstract:
An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
Abstract:
An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.
Abstract:
A touch screen is disclosed. The touch screen can comprise a substrate having a first surface upon which a touch or proximity event is to be detected, and a second surface that opposes the first surface, and a touch sensor electrode and a first display pixel including a first display pixel TFT formed on the second surface of the substrate. The first touch sensor electrode can be disposed between the second surface of the substrate and the first display pixel TFT, and the first touch sensor electrode can be configured to detect the touch or proximity event. In some examples, the substrate can comprise a TFT glass substrate. In some examples, the touch screen can comprise a first touch sensor routing electrically coupled to the first touch sensor electrode, wherein the first touch sensor routing is disposed between the second surface of the substrate and the first display pixel TFT.
Abstract:
An electronic device may be provided with a display that has a layer of liquid crystal material interposed between a color filter layer and a thin-film-transistor layer. The thin-film-transistor layer may have a substrate with an upper surface and a lower surface. A circular polarizer may be formed on the upper surface. Thin-film transistor circuitry such as gate driver circuitry may be formed on the lower surface. A display driver circuit may be mounted on an inactive border region of the lower surface of the thin-film transistor substrate. Display pixels may form an array in a central active region of the display. A grid of metal gate and data lines may distribute signals from the display driver circuit and gate driver circuitry to the display pixels. A grid of non-reflecting lines may be interposed between the grid of metal lines and the lower surface.
Abstract:
A touch screen display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. Each display pixel in the TFT layer may include first and second TFTs coupled in series between a data line and a storage capacitor. The first TFT may have a gate that is coupled to a gate line. The second TFT may have a gate that is coupled to a control line that is different than the gate line. A global enable signal may be provided on the control line, where the enable signal is asserted during display intervals and is deasserted during touch intervals. The second TFT may be formed using a top-gate TFT or a bottom-gate TFT arrangement.
Abstract:
A display may have a thin-film transistor layer and a color filter layer. The display may include light blocking structures formed on a transparent substrate. In one arrangement, a clear planarization layer may be formed over the light blocking structures. The thin-film transistor layer may be formed over the planarization layer. The color filter layer may be integrated with the thin-film transistor layer. At least light blocking structures and the planarization layer should be formed from high temperature resistance material. In another arrangement, the color filter layer may be formed on the light blocking structures. A clear planarization layer may then be formed over the color filter layer. The thin-film transistor layer may be formed on the planarization layer. In this arrangement, the color filter layer also needs to be formed from thermal resistance material.
Abstract:
A display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. A passivation layer may be formed on the thin-film transistor layers. A first low-k dielectric layer may be formed on the passivation layer. Data line routing structures may be formed on the first low-k dielectric layer. A second low-k dielectric layer may be formed on the first low-k dielectric layer. A common voltage electrode and associated storage capacitance may be formed on the second low-k dielectric layer. The first and second low-k dielectric layers may be formed from material having substantially similar refractive indices to maximize backlight transmittance and may have appropriate thicknesses so as to minimize parasitic capacitive loading.
Abstract:
An electronic device may be provided with a display. The display may be formed from an array of organic light-emitting diode display pixels. Each display pixel may have an organic light-emitting diode having an anode and a cathode and may have an associated pixel circuit for controlling the light-emitting diode. The anodes may be formed from patches of metal arranged in an array on the display. The display pixels may be controlled using data lines and gate lines. The gate lines may control thin-film transistors in the pixel circuits. Gate driver circuitry along the left and right edges of the display may supply signals to the gate lines. The pixel circuits may be located in the center of the display between the gate driver circuitry. Some of the anodes may overlap the pixel circuits and some of the anodes may overlap the gate driver circuitry.