Message Handler Compiling and Scheduling in Heterogeneous System Architectures

    公开(公告)号:US20170293499A1

    公开(公告)日:2017-10-12

    申请号:US15094615

    申请日:2016-04-08

    CPC classification number: G06F9/4552

    Abstract: A receiving node in a computer system that includes a plurality of types of execution units receives an active message from a sending node. The receiving node compiles an intermediate language message handler corresponding to the active message into a machine instruction set architecture (ISA) message handler and the receiver executes the ISA message handler on a selected one of the execution units. If the active message handler is not available at the receiver, the sender sends an intermediate language version of the message handler to the receiving node. The execution unit selected to execute the message handler is chosen based on a field in the active message or on runtime criteria in the receiving system.

    INFRASTRUCTURE TO SUPPORT ACCELERATOR COMPUTATION MODELS FOR ACTIVE STORAGE
    33.
    发明申请
    INFRASTRUCTURE TO SUPPORT ACCELERATOR COMPUTATION MODELS FOR ACTIVE STORAGE 审中-公开
    支持主动存储的加速器计算模型的基础设施

    公开(公告)号:US20160335064A1

    公开(公告)日:2016-11-17

    申请号:US14709915

    申请日:2015-05-12

    CPC classification number: G06F8/447 G06F8/4434

    Abstract: A method, a system, and a non-transitory computer readable medium for generating application code to be executed on an active storage device are presented. The parts of an application that can be executed on the active storage device are determined. The parts of the application that will not be executed on the active storage device are converted into code to be executed on a host device. The parts of the application that will be executed on the active storage device are converted into code of an instruction set architecture of a processor in the active storage device.

    Abstract translation: 呈现用于生成要在活动存储设备上执行的应用代码的方法,系统和非暂时性计算机可读介质。 可以在活动存储设备上执行的应用程序的部分被确定。 将不会在活动存储设备上执行的应用程序的部分被转换为要在主机设备上执行的代码。 将在活动存储设备上执行的应用的部分被转换为主动存储设备中的处理器的指令集架构的代码。

    DATA REMAPPING FOR HETEROGENEOUS PROCESSOR
    34.
    发明申请
    DATA REMAPPING FOR HETEROGENEOUS PROCESSOR 审中-公开
    异构处理器的数据重新取代

    公开(公告)号:US20150106587A1

    公开(公告)日:2015-04-16

    申请号:US14055221

    申请日:2013-10-16

    Abstract: A processor remaps stored data and the corresponding memory addresses of the data for different processing units of a heterogeneous processor. The processor includes a data remap engine that changes the format of the data (that is, how the data is physically arranged in segments of memory) in response to a transfer of the data from system memory to a local memory hierarchy of an accelerated processing module (APM) of the processor. The APM's local memory hierarchy includes an address remap engine that remaps the memory addresses of the data at the local memory hierarchy so that the data can be accessed by routines at the APM that are unaware of the data remapping. By remapping the data, and the corresponding memory addresses, the APM can perform operations on the data more efficiently.

    Abstract translation: 处理器重新映射异构处理器的不同处理单元的存储数据和相应的数据存储器地址。 处理器包括响应于数据从系统存储器传输到加速处理模块的本地存储器层级而改变数据格式(即,数据在存储器段中物理布置的方式)的数据重映射引擎 (APM)。 APM的本地存储器层次结构包括地址重映射引擎,其重映射本地存储器层级上的数据的存储器地址,使得可以通过APM的不知道数据重映射的例程来访问数据。 通过重新映射数据和相应的存储器地址,APM可以更有效地对数据执行操作。

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