公开(公告)号：US08896455B2

公开(公告)日：2014-11-25

申请号：US13334057

申请日：2011-12-22

申请人： Kenneth Eguro ,  Alessandro Forin ,  Ray A. Bittner, Jr. ,  Ji Sun

发明人： Kenneth Eguro ,  Alessandro Forin ,  Ray A. Bittner, Jr. ,  Ji Sun

IPC分类号： G08B21/00 ,  G06F21/86 ,  G06F21/55 ,  H04L29/06

CPC分类号： G06F21/554 ,  G06F21/86 ,  G06F2221/2101 ,  H04L63/1425

摘要： An intrusion detection system disclosed herein includes a detector circuit that measures a change in value of impedance of an interconnection circuitry. A decoder coupled to the detector decodes the measured value of the change in the impedance of the interconnection circuitry to determine existence of an abnormal condition. In an example implementation of the intrusion detection system, the change in the value of the impedance of the interconnection circuitry is represented by a change in the phase delay on the interconnection circuitry. An implementation of the intrusion detection circuit terminates communication using the interconnection circuitry upon detection of the abnormal condition. The intrusion detection system is further configured to interpret the abnormal condition as a communication signal to the interconnection circuitry.

摘要翻译： 本文公开的入侵检测系统包括检测器电路，其测量互连电路的阻抗值的变化。 耦合到检测器的解码器解码互连电路的阻抗的变化的测量值，以确定异常状况的存在。 在入侵检测系统的示例实现中，互连电路的阻抗值的变化由互连电路上的相位延迟的变化来表示。 入侵检测电路的实现在检测到异常情况时终止使用互连电路的通信。 入侵检测系统还被配置为将异常状况解释为互连电路的通信信号。

公开(公告)号：US20100325633A1

公开(公告)日：2010-12-23

申请号：US12552944

申请日：2009-09-02

申请人： Kenneth H. Eguro ,  Alessandro Forin

发明人： Kenneth H. Eguro ,  Alessandro Forin

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F15/7871

摘要： Logic and state information suitable for execution on a programmable hardware device may be generated from a task, such as evaluating a regular expression against a corpus. Hardware capacity requirements of the logic and state information on the programmable hardware device may be estimated. Once estimated, a plurality of the logic and state information generated from a plurality of tasks may be distributed into sets such that the logic and state information of each set fits within the hardware capacity of the programmable hardware device. The tasks within each set may be configured to execute in parallel on the programmable hardware device. Sets may then be executed in series, permitting virtualization of the resources.

摘要翻译： 适于在可编程硬件设备上执行的逻辑和状态信息可以从任务产生，例如评估与语料库的正则表达式。 可以估计可编程硬件设备上的逻辑和状态信息的硬件容量要求。 一旦估计，从多个任务产生的多个逻辑和状态信息可以被分配成集合，使得每个集合的逻辑和状态信息适合于可编程硬件设备的硬件容量。 每组中的任务可以被配置为在可编程硬件设备上并行执行。 然后可以串联执行集合，从而允许资源的虚拟化。

公开(公告)号：US07757224B2

公开(公告)日：2010-07-13

申请号：US11347723

申请日：2006-02-02

申请人： Alessandro Forin ,  Nathaniel L. Lynch ,  Richard F. Rashid

发明人： Alessandro Forin ,  Nathaniel L. Lynch ,  Richard F. Rashid

IPC分类号： G06F9/45

CPC分类号： G06F8/447

摘要： A post-compilation tool can rewrite executable images produced by a compiler. The tool can add extension definitions, insert extension-trigger instructions, and add a security signature. Operating system software may be notified of extension capabilities when loading the executable image, and may proceed to load an appropriate processor extension. The operating system software can manage availability of processor extensions on behalf of the applications.

摘要翻译： 后编译工具可以重写由编译器生成的可执行映像。 该工具可以添加扩展名定义，插入扩展触发器指令，并添加安全签名。 当加载可执行映像时，操作系统软件可以被通知扩展能力，并且可以继续加载适当的处理器扩展。 操作系统软件可以代表应用程序管理处理器扩展的可用性。

公开(公告)号：US07529909B2

公开(公告)日：2009-05-05

申请号：US11646662

申请日：2006-12-28

申请人： Richard Neil Pittman ,  Alessandro Forin ,  Nathaniel L. Lynch

发明人： Richard Neil Pittman ,  Alessandro Forin ,  Nathaniel L. Lynch

IPC分类号： G06F9/30

CPC分类号： G06F9/30181 ,  G06F9/3822 ,  G06F9/3897 ,  G06F15/7867 ,  Y02D10/12 ,  Y02D10/13

摘要： Described is microprocessor architecture that includes at least one reconfigurable execution path (e.g., implemented via FPGAs or CPLDs). When an instruction is fetched, a mechanism determines whether the reconfigurable execution path (and/or which path) will handle that instruction. A content addressable memory may be used to determine the execution path when fed the instruction's operational code, or an arbiter and multiplexer may resolve conflicts if multiple instruction decode blocks recognize the same instruction. The execution path may be dynamically reconfigured, activated or deactivated as needed, such as to extend an instruction set, to optimize instructions for a particular application program, to implement a peripheral device, to provide parallel computing, and/or based on power consumption and/or processing power needs. Security may be provided by having the reconfigurable execution path loaded from an extension file that is associated with metadata, including security information.

摘要翻译： 描述的是包括至少一个可重构执行路径（例如，通过FPGA或CPLD实现）的微处理器架构。 当获取指令时，机制确定可重构执行路径（和/或哪个路径）是否将处理该指令。 内容可寻址存储器可以用于在馈送指令的操作代码时确定执行路径，或者如果多个指令解码块识别相同的指令，仲裁器和多路复用器可以解决冲突。 可以根据需要动态地重新配置，激活或去激活执行路径，例如扩展指令集，优化特定应用程序的指令，实现外围设备，提供并行计算和/或基于功耗和 /或处理电源需求。 可以通过使可重新配置的执行路径从与元数据相关联的扩展文件（包括安全信息）加载来提供安全性。

公开(公告)号：US20050223018A1

公开(公告)日：2005-10-06

申请号：US11136246

申请日：2005-05-23

申请人： Alessandro Forin ,  Johannes Helander

发明人： Alessandro Forin ,  Johannes Helander

IPC分类号： G06F7/00 ,  G06F17/30 ,  G06Q40/00

CPC分类号： G06F9/44521 ,  G06F8/41 ,  G06F9/4411 ,  G06F9/4413 ,  G06Q10/10 ,  G06Q40/00

摘要： A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables. This method includes selecting a portion of code in the previously linked file, removing the portion of code from the previously linked file, and constructing a dynamically linked library file containing the portion of the code, the dynamically linked library file being available to plural files including the previously linked-file. A method of converting an image which has been previously linked for executing in an unshared memory into an image optimized for use with virtual memory.

摘要翻译： 一种从对象文件生成可执行映象的方法，该操作系统没有共享库支持，其中可执行映像需要共享库文件，以便解析目标文件中调用的符号中的至少一个。 一种优化将先前链接的文件加载到计算机中的工作存储器中以在工作存储器的单个地址空间中执行的方法，该文件包含通过导入部分间接跳转到共享库中的位置的指令 的文件。 一种用于优化先前链接的文件加载到计算机中的工作存储器中用于在工作存储器的单个地址空间中执行的方法，该文件包含在每个部分的末尾与后续页面边界之间具有填充填充填充的多个部分 。 优化将先前链接的文件加载到计算机中的工作存储器中以在与其他可执行文件共享的存储器中执行的方法。 该方法包括选择先前链接的文件中的一部分代码，从先前链接的文件中移除部分代码，以及构建包含代码部分的动态链接的库文件，动态链接的库文件可用于多个文件，包括 先前链接的文件。 将先前链接的用于在非共享存储器中执行的图像转换为优化用于虚拟存储器的图像的方法。

公开(公告)号：US06826763B1

公开(公告)日：2004-11-30

申请号：US09458139

申请日：1999-12-09

申请人： Yi-Min Wang ,  Galen C. Hunt ,  Alessandro Forin

发明人： Yi-Min Wang ,  Galen C. Hunt ,  Alessandro Forin

IPC分类号： G06F946

CPC分类号： G06F9/547 ,  G06F9/465

摘要： A method for improving the performance of a distributed object model over a network is disclosed. A client computer contains a client object which can call an interface on a server object located on a server computer. Rather than copying all of the call parameters into an RPC buffer for transmission across the network, a network interface card with scatter-gather capability can be used. The RPC data can contain only a list of pointers into the client memory and a size of each parameter. The network interface card can then grab the parameters directly from the client memory using the list in the RPC buffer without the need to copy the data itself. At the server side, the network interface card can place the parameters into an RPC buffer, or if the size is known beforehand, directly into the server memory. The server can also access the parameters directly from the RPC buffer. On the return, the server can use a callback function to indicate when its network interface card has finished sending the response data so that the server does not clear its memory prematurely. At the client side, if the size of the response is not known, and the data is placed into the RPC buffers, it can be copied from the RPC buffer into the client memory.

摘要翻译： 公开了一种通过网络改善分布式对象模型的性能的方法。 客户端计算机包含可以调用位于服务器计算机上的服务器对象上的接口的客户端对象。 可以使用具有分散收集功能的网络接口卡，而不是将所有呼叫参数复制到RPC缓冲区中，以便通过网络进行传输。 RPC数据只能包含指向客户机内存的指针列表和每个参数的大小。 然后，网络接口卡可以使用RPC缓冲区中的列表直接从客户端存储器中获取参数，而无需复制数据本身。 在服务器端，网络接口卡可以将参数放入RPC缓冲区，或者如果事先知道大小，则直接进入服务器内存。 服务器也可以直接从RPC缓冲区访问参数。 返回时，服务器可以使用回调函数来指示其网络接口卡何时完成发送响应数据，以致服务器不能过早清除其内存。 在客户端，如果响应的大小不知道，并且数据被放置到RPC缓冲区中，则可以将其从RPC缓冲区复制到客户端存储器中。

公开(公告)号：US06594701B1

公开(公告)日：2003-07-15

申请号：US09223967

申请日：1998-12-31

申请人： Alessandro Forin

发明人： Alessandro Forin

IPC分类号： G06F1516

CPC分类号： H04L47/225 ,  G06F12/1081 ,  G06F17/30949 ,  H04L47/10 ,  H04L47/18 ,  H04L47/193 ,  H04L47/30 ,  H04L47/39

摘要： Methods and systems for controlling data flow between a sender and a receiver include communicating credit lists to the sender. The credit lists include credits indicative of receive buffer sizes accessible by the receiver and capable of receiving data. The sender transmits data packets to the receiver. The data packets are preferably no greater in size than the credits specified in the credit list. When the sender uses all of the credits, the sender preferably refrains from sending data packets to the receiver until the supply of credits is replenished by the receiver. Because data flow between the sender and the receiver is regulated using credits, the likelihood of data overflow errors is reduced and communication efficiency is increased.

摘要翻译： 用于控制发送者和接收者之间的数据流的方法和系统包括将信用列表传送给发送者。 信用列表包括指示接收器可访问的接收缓冲器大小的信用并且能够接收数据。 发送方向接收方发送数据包。 数据分组的大小优选不大于信用列表中指定的信用额度。 当发送方使用所有信用时，发送方最好不要向接收方发送数据包，直到接收方补充信用。 由于发送方和接收方之间的数据流量使用信用进行调整，所以数据溢出错误的可能性降低，通信效率提高。

公开(公告)号：US06981051B2

公开(公告)日：2005-12-27

申请号：US09844153

申请日：2001-04-27

申请人： Vadim Eydelman ,  Khawar M. Zuberi ,  Michael T. Massa ,  Alessandro Forin

发明人： Vadim Eydelman ,  Khawar M. Zuberi ,  Michael T. Massa ,  Alessandro Forin

IPC分类号： G06F9/46 ,  H04L12/56 ,  G06F15/16

CPC分类号： H04L47/10 ,  G06F9/54 ,  H04L47/30 ,  H04L47/39

摘要： A method and system for directing data transfers between applications and devices residing on different computers or devices using an adaptive flow control protocol has been described. When an application or device requests to transfer data with another application or device, adaptive flow control protocol adapts the way data is transferred by observing when an application that is receiving data posts a receive buffer and detects the receive buffer's size. Based upon the application's or device's behavior, the adaptive flow control protocol transfers the data in a mode that is best suited for the application.

摘要翻译： 已经描述了用于使用自适应流控制协议在驻留在不同计算机或设备上的应用和设备之间引导数据传输的方法和系统。 当应用程序或设备请求与其他应用程序或设备传输数据时，自适应流控制协议通过观察正在接收数据的应用程序何时发布接收缓冲区并检测接收缓冲区的大小来调整数据传输的方式。 基于应用或设备的行为，自适应流控制协议以最适合于应用的模式传输数据。

公开(公告)号：US20050066082A1

公开(公告)日：2005-03-24

申请号：US10966748

申请日：2004-10-15

申请人： Alessandro Forin ,  Andrew Raffman

发明人： Alessandro Forin ,  Andrew Raffman

IPC分类号： G06F3/00 ,  G06F5/06 ,  G06F13/10

CPC分类号： G06F5/065 ,  G06F2205/064 ,  G06F2205/106

摘要： Multiple non-blocking FIFO queues are concurrently maintained using atomic compare-and-swap (CAS) operations. In accordance with the invention, each queue provides direct access to the nodes stored therein to an application or thread, so that each thread may enqueue and dequeue nodes that it may choose. The prior art merely provided access to the values stored in the node. In order to avoid anomalies, the queue is never allowed to become empty by requiring the presence of at least a dummy node in the queue. The ABA problem is solved by requiring that the next pointer of the tail node in each queue point to a “magic number” unique to the particular queue, such as the pointer to the queue head or the address of the queue head, for example. This obviates any need to maintain a separate count for each node.

摘要翻译： 使用原子比较和交换（CAS）操作同时维护多个非阻塞FIFO队列。 根据本发明，每个队列提供对存储在其中的节点对应用或线程的直接访问，使得每个线程可以对其可以选择的节点进行排队和出队。 现有技术仅提供对存储在节点中的值的访问。 为了避免异常，通过要求队列中至少存在一个虚拟节点，不允许队列变空。 ABA问题是通过要求每个队列中的尾部节点的下一个指针指向特定队列所特有的“魔术数”，例如指向队列头的指针或队列头的地址。 这不需要为每个节点维护一个单独的计数。

公开(公告)号：US06760787B2

公开(公告)日：2004-07-06

申请号：US09907222

申请日：2001-07-17

申请人： Alessandro Forin

发明人： Alessandro Forin

IPC分类号： G06F1314

CPC分类号： G06F11/141 ,  G06F12/1081 ,  G06F17/30949 ,  Y10S707/99953

摘要： A recoverable I/O request processor includes computer-executable instructions for processing I/O requests, such as requests to send or receive data through a network. The recoverable I/O request processor translates virtual memory addresses to physical memory addresses utilizing translation tables local to an I/O device. If a local translation fails, the recoverable I/O request processor requests virtual address mapping information from the operating system.

摘要翻译： 可恢复的I / O请求处理器包括用于处理I / O请求的计算机可执行指令，例如通过网络发送或接收数据的请求。 可恢复的I / O请求处理器使用I / O设备本地的转换表将虚拟内存地址转换为物理内存地址。 如果本地转换失败，则可恢复I / O请求处理器从操作系统请求虚拟地址映射信息。