公开(公告)号：US09965277B2

公开(公告)日：2018-05-08

申请号：US14567797

申请日：2014-12-11

Applicant: Intel Corporation

Inventor： Mohammad A. Abdallah

IPC: G06F9/312 ,  G06F5/14 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30043 ,  G06F5/14 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/30185 ,  G06F9/3824 ,  G06F9/3826 ,  G06F9/3834 ,  G06F9/3836 ,  G06F9/3842 ,  G06F2205/063 ,  G06F2205/064

Abstract: An out of order processor. The processor includes a virtual load store queue for allocating a plurality of loads and a plurality of stores, wherein more loads and more stores can be accommodated beyond an actual physical size of the load store queue of the processor; wherein the processor allocates other instructions besides loads and stores beyond the actual physical size limitation of the load/store queue; and wherein the other instructions can be dispatched and executed even though intervening loads or stores do not have spaces in the load store queue.

公开(公告)号：US09851941B2

公开(公告)日：2017-12-26

申请号：US14307864

申请日：2014-06-18

Applicant: John Ralston

Inventor： John Ralston

IPC: G06F5/14 ,  G06F13/16 ,  G06F13/12 ,  G06F13/38 ,  H04L12/879

CPC classification number: G06F5/14 ,  G06F13/128 ,  G06F13/1673 ,  G06F13/385 ,  G06F2205/064 ,  H04L49/901

Abstract: A method and apparatus for handling incoming data frames within a network interface controller. The network interface controller comprises at least one controller component operably coupled to at least one memory element. The at least one controller component is arranged to identify a next available buffer pointer from a pool of buffer pointers stored within a first area of memory within the at least one memory element, receive an indication that a start of a data frame has been received via a network interface, and allocate the identified next available buffer pointer to the data frame.

公开(公告)号：US09690507B2

公开(公告)日：2017-06-27

申请号：US15192882

申请日：2016-06-24

Applicant: Innovium, Inc.

Inventor： William Brad Matthews ,  Bruce H. Kwan ,  Mohammad K. Issa ,  Neil Barrett ,  Avinash Gyanendra Mani

IPC: G06F3/06 ,  G06F12/06

CPC classification number: G06F3/0619 ,  G06F3/0613 ,  G06F3/0629 ,  G06F3/0644 ,  G06F3/065 ,  G06F3/067 ,  G06F3/0673 ,  G06F5/06 ,  G06F7/08 ,  G06F12/0607 ,  G06F2205/064

Abstract: A memory system for a network device is described. The memory system includes a main memory configured to store one or more data elements. Further, the memory system includes a link memory that is configured to maintain one or more pointers to interconnect the one or more data elements stored in the main memory. The memory system also includes a free-entry manager that is configured to generate an available bank set including one or more locations in the link memory. In addition, the memory system includes a context manager that is configured to maintain metadata for a list of the one or more data elements.

公开(公告)号：US20150154142A1

公开(公告)日：2015-06-04

申请号：US14096949

申请日：2013-12-04

Applicant: Oracle International Corporation

Inventor： Uttam Aggarwal

IPC: G06F15/167 ,  H04L29/08

CPC classification number: H04L67/28 ,  G06F5/06 ,  G06F13/385 ,  G06F2205/064 ,  H04L67/2871

Abstract: A system and method can support input/output (I/O) virtualization in a computing environment. The system can comprise a chip, which is associated with a server on a network fabric. Additionally, the chip is associated with an external memory that contains a plurality of packet buffers. Moreover, an on-chip memory maintains a state of one or more packets that contain disk-read data received from a physical host bus adaptor (HBA). Furthermore, the chip operates to en-queue said one or more packets in the plurality of packet buffers on the external memory, read out said one or more packets from the external memory based on the state of said one or more packets, and send said one or more packets to the server.

Abstract translation: 系统和方法可以在计算环境中支持输入/输出（I / O）虚拟化。 该系统可以包括与网络结构上的服务器相关联的芯片。 此外，芯片与包含多个分组缓冲器的外部存储器相关联。 此外，片上存储器保持包含从物理主机总线适配器（HBA）接收的磁盘读取数据的一个或多个分组的状态。 此外，芯片操作以对外部存储器上的多个分组缓冲器中的所述一个或多个分组进行排队，基于所述一个或多个分组的状态从外部存储器读出所述一个或多个分组，并发送所述 一个或多个数据包到服务器。

公开(公告)号：US20150124832A1

公开(公告)日：2015-05-07

申请号：US14462453

申请日：2014-08-18

Applicant: Cisco Technology, Inc.

Inventor： Sha Ma ,  Philip Chen

IPC: H04L12/865 ,  H04L12/863

CPC classification number: H04L47/6275 ,  G06F5/16 ,  G06F9/4881 ,  G06F2205/064 ,  H04L45/74 ,  H04L47/50 ,  H04L47/562 ,  H04L47/62 ,  H04L47/623

Abstract: A work conserving scheduler can be implemented based on a ranking system to provide the scalability of time stamps while avoiding the fast search associated with a traditional time stamp implementation. Each queue can be assigned a time stamp that is initially set to zero. The time stamp for a queue can be incremented each time a data packet from the queue is processed. To provide varying weights to the different queues, the time stamp for the queues can be incremented at varying rates. The data packets can be processed from the queues based on the tier rank order of the queues as determined from the time stamp associated with each queue. To increase the speed at which the ranking is determined, the ranking can be calculate from a subset of the bits defining the time stamp rather than the entire bit set.

Abstract translation: 可以基于排名系统来实现工作保存调度器，以提供时间戳的可扩展性，同时避免与传统时间戳实现相关联的快速搜索。 可以为每个队列分配最初设置为零的时间戳。 每当处理来自队列的数据包时，队列的时间戳可以递增。 为了向不同的队列提供变化的权重，队列的时间戳可以以不同的速率递增。 可以根据从与每个队列相关联的时间戳确定的队列的层次顺序，从队列处理数据分组。 为了提高确定排名的速度，可以从定义时间戳而不是整个比特集的比特的子集中计算排名。

公开(公告)号：US08499105B2

公开(公告)日：2013-07-30

申请号：US12782823

申请日：2010-05-19

Applicant: Bin Wang

Inventor： Bin Wang

IPC: G06F3/00

CPC classification number: G06F5/06 ,  G06F2205/064

Abstract: Embodiments of the present invention provide a buffer manager and a buffer management method based on an address pointer linked list. In the embodiments, address pointers of all buffer blocks in a buffer are divided into several groups, lower bits of address pointers in each group are used to record a linked list between the address pointers in the same group, and an address pointer which is pointed by one predetermined address pointer of each group and is in a different group is further recorded to upbuild a linked list between the groups. Thereby, an address linked list can still be stored without a RAM with a width equal to a pointer depth and with a depth equal to the total number of buffer blocks in the buffer as required by the conventional art, which greatly reduces hardware resources required.

Abstract translation: 本发明的实施例提供了一种基于地址指针链表的缓冲器管理器和缓冲器管理方法。 在这些实施例中，缓冲器中的所有缓冲块的地址指针被分成几组，每组中的地址指针的较低位用于在同一组中的地址指针之间记录链表，以及指向的地址指针 通过每组的一个预定地址指针并且在不同的组中进一步被记录以在组之间建立链接列表。 因此，仍然可以存储地址链表，而没有RAM具有等于指针深度的宽度，并且深度等于传统技术所要求的缓冲器中的缓冲器块的总数，这大大降低了所需的硬件资源。

公开(公告)号：US20110145827A1

公开(公告)日：2011-06-16

申请号：US12637535

申请日：2009-12-14

Applicant: Chunyan Song ,  Stephen H. Toub

Inventor： Chunyan Song ,  Stephen H. Toub

IPC: G06F9/46 ,  G06F7/00

CPC classification number: G06F7/78 ,  G06F9/526 ,  G06F2205/064

Abstract: The present invention extends to methods, systems, and computer program products for maintaining a count for lock-free stack access. A numeric value representative of the total count of nodes in a linked list is maintained at the head node for the linked list. Commands for pushing and popping nodes appropriately update the total count at a new head node when nodes are added to and removed from the linked list. Thus, determining the count of nodes in a linked list is an order 1 (or O(1)) operation, and remains constant even when the size of a linked list changes

Abstract translation: 本发明延伸到用于维持无锁堆栈访问的计数的方法，系统和计算机程序产品。 表示链表中节点总数的数值在链表的头节点处被维护。 当节点被添加到链接列表中并从链接列表中删除时，用于推送和弹出节点的命令适当地更新新头节点处的总计数。 因此，确定链表中的节点的数量是一个顺序1（或O（1））操作，并且即使当链表的大小改变时也保持不变

公开(公告)号：US07603496B2

公开(公告)日：2009-10-13

申请号：US11337111

申请日：2006-01-23

Applicant: Christopher Edwin Wrigley ,  David John Gwilt

Inventor： Christopher Edwin Wrigley ,  David John Gwilt

IPC: G06F3/00 ,  G06F13/36

CPC classification number: G06F5/065 ,  G06F5/14 ,  G06F2205/064

Abstract: A buffer is disclosed for storing data being transferred using a plurality of control channels, a data item of said data being transferred between a data source and a data destination using one of said plurality of control channels, said buffer comprising: a data input port operable to receive said data being transferred using said plurality of control channels; a data output port operable to output data to be transferred using said plurality of control channels; and a data store operable to store data received from said data input port prior to it being output by said data output port, said data store comprising a plurality of storage locations each operable to store a data item, said storage locations being arranged in groups, a storage location being allocated to a group in dependence on the control channel that a data item that it stores is received from, such that each group comprises storage locations storing data items received from a same one of said plurality of control channels. Free storage locations are not allocated to any of the plurality of groups, so that new data items received can be stored in any of the free storage locations, these locations then being allocated to the group corresponding to the channel being used.

Abstract translation: 公开了一种用于存储使用多个控制信道传输的数据的缓冲器，所述数据的数据项使用所述多个控制信道之一在数据源和数据目的地之间传送，所述缓冲器包括：可操作的数据输入端口 接收使用所述多个控制信道传输的所述数据; 数据输出端口，其可操作以使用所述多个控制信道输出要传送的数据; 以及数据存储器，用于在由所述数据输出端口输出之前存储从所述数据输入端口接收的数据，所述数据存储器包括多个存储位置，每个存储位置可操作以存储数据项，所述存储位置被分组排列， 存储位置根据控制信道被分配给组，其中存储的数据项被接收，使得每个组包括存储从所述多个控制信道中的相同一个控制信道接收的数据项的存储位置。 空闲存储位置不分配给多个组中的任一组，使得接收到的新数据项可以存储在任何空闲存储位置中，然后这些位置被分配给与所使用的信道相对应的组。

公开(公告)号：US07426604B1

公开(公告)日：2008-09-16

申请号：US11453759

申请日：2006-06-14

Applicant: Hans Olaf Rygh ,  Finn Egil Hoeyer Grimnes ,  Brian Edward Manula

Inventor： Hans Olaf Rygh ,  Finn Egil Hoeyer Grimnes ,  Brian Edward Manula

IPC: G06F5/10 ,  G06F12/00

CPC classification number: G06F5/06 ,  G06F2205/064

Abstract: A buffer architecture enables linked lists to be used to administer virtual output queue buffering. The buffer has three random access memories (RAMs). A data RAM holds data. A free RAM holds a linked list of entries defining free space in the data RAM. Destination RAM holds a linked list of entries defining data in the data RAM to be forwarded to a destination.

Abstract translation: 缓冲区架构使链表能够用于管理虚拟输出队列缓冲。 缓冲器具有三个随机存取存储器（RAM）。 数据RAM保存数据。 一个空闲的RAM包含定义数据RAM中可用空间的条目的链表。 目的地RAM保存在数据RAM中定义要转发到目的地的数据的条目的链表。

公开(公告)号：US07194569B1

公开(公告)日：2007-03-20

申请号：US10805571

申请日：2004-03-19

Applicant: Nicholas Shaylor

Inventor： Nicholas Shaylor

IPC: G06F12/00

CPC classification number: G06F17/30958 ,  G06F5/065 ,  G06F2205/064 ,  Y10S707/99942

Abstract: A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address field, an offset field, wherein the, and a length field. The type field may be configured, for example, to indicate a data structure type. The data structure type may be configured to assume a values indicating one of a contiguous buffer, a scatter-gather list and a linked list structure, among other such data structures. The base address field may be configured, for example, to store a base address, with the base address being a starting address of a secondary data structure associated with the data descriptor record. The offset field may be configured, for example, to indicate a starting address of data within a secondary data structure pointed to by a base address stored in the base address field. The length field is configured to indicate a length of data stored in a secondary data structure pointed to by a base address stored in the base address field.

Abstract translation: 公开了一种数据结构。 数据结构包括数据描述符记录。 依次，数据描述符记录包括类型字段，基地址字段，偏移字段，其中，和长度字段。 类型字段可以被配置为例如指示数据结构类型。 数据结构类型可以被配置为假设指示连续缓冲器，分散收集列表和链接列表结构之一的值以及其他这样的数据结构。 基地址字段可以被配置为例如存储基地址，其中基地址是与数据描述符记录相关联的辅助数据结构的起始地址。 偏移字段可以被配置为例如指示由存储在基地址字段中的基地址指向的辅助数据结构内的数据的起始地址。 长度字段被配置为指示存储在由基地址字段中存储的基地址指向的辅助数据结构中的数据的长度。