Register files for a digital signal processor operating in an interleaved multi-threaded environment
    31.
    发明申请
    Register files for a digital signal processor operating in an interleaved multi-threaded environment 有权
    为交错多线程环境中的数字信号处理器注册文件

    公开(公告)号:US20060242384A1

    公开(公告)日:2006-10-26

    申请号:US11115916

    申请日:2005-04-26

    IPC分类号: G06F15/00

    摘要: A processor device is disclosed and includes a memory and a sequencer that is responsive to the memory. The sequencer supports very long instruction word (VLIW) type instructions and at least one VLIW instruction packet uses a number of operands during execution. The processor device further includes a plurality of instruction execution units responsive to the sequencer and a plurality of register files. Each of the plurality of register files includes a plurality of registers and the plurality of register files are coupled to the plurality of instruction execution units. Further, each of the plurality of register files includes a number of data read ports and the number of data read ports of each of the plurality of register files is less than the number of operands used by the at least one VLIW instruction packet.

    摘要翻译: 公开了处理器设备,并且包括响应于存储器的存储器和定序器。 定序器支持非常长的指令字(VLIW)类型指令,并且至少一个VLIW指令分组在执行期间使用多个操作数。 处理器设备还包括响应于定序器的多个指令执行单元和多个寄存器文件。 多个寄存器文件中的每一个包括多个寄存器,并且多个寄存器文件耦合到多个指令执行单元。 此外,多个寄存器文件中的每一个包括多个数据读取端口,并且多个寄存器堆栈中的每一个的数据读取端口的数量小于由至少一个VLIW指令包使用的操作数的数量。

    Unified non-partitioned register files for a digital signal processor operating in an interleaved multi-threaded environment
    32.
    发明申请
    Unified non-partitioned register files for a digital signal processor operating in an interleaved multi-threaded environment 审中-公开
    用于在交错多线程环境中工作的数字信号处理器的统一非分区寄存器文件

    公开(公告)号:US20060230253A1

    公开(公告)日:2006-10-12

    申请号:US11103744

    申请日:2005-04-11

    IPC分类号: G06F15/00

    摘要: A processor device is disclosed and includes a memory and a sequencer that is responsive to the memory. The sequencer can support very long instruction word (VLIW) instructions and superscalar instructions. The processor device further includes a first instruction execution unit responsive to the sequencer, a second instruction execution unit responsive to the sequencer, a third instruction execution unit responsive to the sequencer, and a fourth instruction execution unit responsive to the sequencer. Further, the processor device includes a plurality of register files and each of the plurality of register files includes a plurality of registers. The plurality of register files are coupled to the sequencer and coupled to the first instruction execution unit, the second instruction execution unit, the third instruction execution unit, and the fourth instruction execution unit.

    摘要翻译: 公开了处理器设备,并且包括响应于存储器的存储器和定序器。 音序器可以支持非常长的指令字(VLIW)指令和超标量指令。 处理器装置还包括响应于定序器的第一指令执行单元,响应于定序器的第二指令执行单元,响应于定序器的第三指令执行单元,以及响应于定序器的第四指令执行单元。 此外,处理器装置包括多个寄存器文件,并且多个寄存器文件中的每一个包括多个寄存器。 多个寄存器文件耦合到定序器并耦合到第一指令执行单元,第二指令执行单元,第三指令执行单元和第四指令执行单元。

    Method and system for variable thread allocation and switching in a multithreaded processor
    33.
    发明申请
    Method and system for variable thread allocation and switching in a multithreaded processor 有权
    多线程处理器中可变线程分配和切换的方法和系统

    公开(公告)号:US20060218559A1

    公开(公告)日:2006-09-28

    申请号:US11089474

    申请日:2005-03-23

    IPC分类号: G06F9/46

    CPC分类号: G06F9/3851

    摘要: Techniques for processing transmissions in a communications (e.g., CDMA) system. An aspect of the disclosed subject matter includes a method for processing instructions on a multithreaded processor. The multithreaded processor processes a plurality of threads via a plurality of processor pipelines. The method includes the step determining the operating frequency, F, at which the multithreaded processor operates. Then, the method determines a variable thread switch timeout state for triggering the switching of the processing among the plurality of active threads. The variable thread switch timeout state varies so that each of the plurality of active threads operates at a frequency of an allocated portion of the frequency, F. The allocated portion at which the active threads operate is determined at least in part in order to optimize the operation of the multithreaded processor. The method further switches the processing from a first one of the active threads to a next one of the active threads upon the occurrence of the variable thread switch timeout state.

    摘要翻译: 用于在通信(例如,CDMA)系统中处理传输的技术。 所公开的主题的一个方面包括用于在多线程处理器上处理指令的方法。 多线程处理器经由多个处理器管线处理多个线程。 该方法包括确定多线程处理器工作的工作频率F的步骤。 然后,该方法确定用于触发多个活动线程之间的处理切换的可变线程切换超时状态。 可变线程切换超时状态改变,使得多个活动线程中的每一个以所分配的频率部分F的频率运行。活动线程运行的分配部分至少部分地被确定,以便优化 操作多线程处理器。 在发生可变线程切换超时状态时,该方法还将处理从主动线程中的第一个切换到下一个活动线程。

    Diagnostic system for detecting rupture or thinning of diaphragms
    35.
    发明申请
    Diagnostic system for detecting rupture or thinning of diaphragms 有权
    用于检测隔膜破裂或变薄的诊断系统

    公开(公告)号:US20060152380A1

    公开(公告)日:2006-07-13

    申请号:US11031953

    申请日:2005-01-07

    IPC分类号: G08B21/00 G01R27/26

    摘要: A diaphragm diagnostic system for use in an industrial field device has a diaphragm and a diagnostic feature. The diaphragm is configured to couple the field device to a process fluid and has a plurality of layers. A first layer of the plurality of layers is exposed to process fluid of an industrial process. A diagnostic feature is coupled to the diaphragm to monitor an electrical parameter of the diaphragm and responsively infer an operative state of the diaphragm based on a change in the monitored electrical parameter.

    摘要翻译: 用于工业现场设备的隔膜诊断系统具有隔膜和诊断特征。 隔膜被配置成将现场设备耦合到过程流体并且具有多个层。 多层中的第一层暴露于工业过程的工艺流体。 诊断特征耦合到隔膜以监测隔膜的电参数,并基于监测的电参数的变化响应地推断隔膜的操作状态。

    Decoy tethering device
    37.
    发明授权

    公开(公告)号:US10555518B2

    公开(公告)日:2020-02-11

    申请号:US15704604

    申请日:2017-09-14

    申请人: William Anderson

    发明人: William Anderson

    IPC分类号: A01M31/06 B63B21/24

    摘要: A decoy tethering device for deploying and retrieving a decoy assembly includes a housing. A line is selectively extensible from and retractable into the housing. A fastener is selectively couplable to the line. A coupler that is coupled to the housing is configured to couple to a keel of a decoy. A connector that is coupled to a second end of the line is configured to couple to a weight. The fastener is positioned to decouple from the line to both extend and retract the line from the housing, and to couple to the line to retain the line in an extended configuration. The coupler is configured to couple the housing to the keel of the decoy. The connector is configured to couple to the weight to position the weight to retain the decoy in place on a surface of a body of water in which the weight is positioned.

    Cutaneous proprioreceptive activation garment system
    40.
    发明授权
    Cutaneous proprioreceptive activation garment system 有权
    皮肤主观激活服装系统

    公开(公告)号:US09433526B2

    公开(公告)日:2016-09-06

    申请号:US12435352

    申请日:2009-05-04

    IPC分类号: A61F13/02 A61F7/02 A61F5/01

    摘要: An appliance for application to the human body for injury prevention, rehabilitation, support, to enhance strength, and to improve posture. The claimed invention may provide an applicator of a relatively elastic material having a first portion for attachment to a first insertion point of a muscle and a second portion for attachment to a second insertion point of the muscle to provide support to the injured muscle. Alternatively, the claimed invention may provide a central portion for attachment to an injured area and any number of extension portions for attachment to the surrounding tissue.

    摘要翻译: 一种适用于人体伤害预防,康复,支持,增强力量和改善姿势的器具。 所要求保护的发明可以提供具有相对弹性材料的施加器,其具有用于附接到肌肉的第一插入点的第一部分和用于附接到肌肉的第二插入点的第二部分,以向受伤的肌肉提供支撑。 或者,要求保护的发明可以提供用于附接到受伤区域的中心部分和用于附接到周围组织的任何数量的延伸部分。