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    Location identification using broadcast wireless signal signatures
    31.
    发明授权
    Location identification using broadcast wireless signal signatures 有权
    使用广播无线信号签名的位置识别

    公开(公告)号：US08106828B1

    公开(公告)日：2012-01-31

    申请号：US12209971

    申请日：2008-09-12

    Applicant: Ju-Yong Do ,  Andy Lee ,  David Gotwisner ,  Dimitri Rubin ,  Matthew Rabinowitz

    Inventor： Ju-Yong Do ,  Andy Lee ,  David Gotwisner ,  Dimitri Rubin ,  Matthew Rabinowitz

    IPC: G01S3/02

    CPC classification number: H04H60/51 ,  G01S5/0252 ,  H04B17/27 ,  H04N21/25841 ,  H04W64/00

    Abstract: An apparatus for location identification using broadcast wireless signal signatures includes a receiver to receive first measurements of a plurality of wireless television signals. The first measurements are made by a remote device receiving the plurality of wireless television signals. In addition, the apparatus includes a processor to select one or more of a plurality of possible locations of the remote device based on the first measurements and a plurality of associations each associating one of the possible locations with expected values. Moreover, the receiver receives second measurements of the wireless television signals made by one or more monitor units, and the processor generates the expected values for the first measurements and the associations based on the second measurements and the locations of the one or more monitor units.

    Abstract translation: 用于使用广播无线信号签名的位置识别的装置包括接收多个无线电视信号的第一测量的接收机。 第一测量由接收多个无线电视信号的远程设备进行。 另外，该设备包括处理器，用于基于第一测量值选择远程设备的多个可能位置中的一个或多个，以及多个关联，每个关联将每个可能位置之一与期望值相关联。 此外，接收机接收由一个或多个监视器单元产生的无线电视信号的第二测量，并且处理器基于第二测量和一个或多个监视器单元的位置，产生用于第一测量和关联的期望值。

    Fracturable lookup table and logic element
    36.
    发明授权
    Fracturable lookup table and logic element 有权
    可破坏的查找表和逻辑元素

    公开(公告)号：US07312632B2

    公开(公告)日：2007-12-25

    申请号：US11753048

    申请日：2007-05-24

    Applicant: David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

    Inventor： David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

    IPC: H03K19/173

    CPC classification number: H03K19/17728 ,  H03K19/1737

    Abstract: A logic element includes memory elements, multiplexers, and controls. The multiplexers are arranged in levels including a highest level of multiplexers with inputs connected to the memory elements and outputs connected to inputs of a next-to-highest level of multiplexers and a first level of multiplexers with inputs connected to outputs of a second level of multiplexers and at least one output. The controls are connected to the multiplexers. In a first operational mode the controls determine a first-mode output at the at least one output of the first level of multiplexers, and in a second operational mode the controls determine a plurality of second-mode outputs at selected outputs of multiplexers not at the first level of multiplexers.

    Abstract translation: 逻辑元件包括存储器元件，多路复用器和控制器。 多路复用器被布置在包括最高级别的多路复用器的级别中，其中连接到存储器元件的输入端和连接到下一级到最高级复用器的输出的输出端和第一级多路复用器，其输入端连接到第二级 多路复用器和至少一个输出。 控制器连接到多路复用器。 在第一操作模式中，所述控制确定所述第一级多路复用器的所述至少一个输出处的第一模式输出，并且在第二操作模式中，所述控制确定多路复用器的选定输出处的多个第二模式输出， 第一级多路复用器。

    VERSATILE LOGIC ELEMENT AND LOGIC ARRAY BLOCK
    37.
    发明申请
    VERSATILE LOGIC ELEMENT AND LOGIC ARRAY BLOCK 有权

    公开(公告)号：US20070252617A1

    公开(公告)日：2007-11-01

    申请号：US11743625

    申请日：2007-05-02

    Applicant: David Lewis ,  Paul Leventis ,  Andy Lee ,  Henry Kim ,  Bruce Pedersen ,  Chris Wysocki ,  Christopher Lane ,  ALexander Marquardt ,  Vikram Santurkar ,  Vaughn Betz

    Inventor： David Lewis ,  Paul Leventis ,  Andy Lee ,  Henry Kim ,  Bruce Pedersen ,  Chris Wysocki ,  Christopher Lane ,  ALexander Marquardt ,  Vikram Santurkar ,  Vaughn Betz

    IPC: H03K19/177

    CPC classification number: H03K19/17764 ,  H03K19/1737 ,  H03K19/17728 ,  H03K19/17736

    Abstract: An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block such as a lookup table (“LUT”) and a flip-flop. Within the logic element, multiplexers are provided to allow the flip-flop and the LUT to be programmably connected such that either the output of the LUT may be connected to the input of the flip-flop or the output of the flip-flop may be connected to the input of the LUT. An additional multiplexer allows the output of the flip-flop in one logic element to be connected to the input of a flip-flop in a different logic element within the same LAB. Output multiplexers selects between the output of the LUT and the output of the flip-flop to generate signals that drive routing lines within the LAB and to routing lines external to the LAB. These output multiplexers are constructed such that the combinational output (output from the LUT) is faster than the output from the flip-flop. A collection of routing lines and multiplexers within the LAB are used to provide inputs to the LUTs. Each of the input multiplexers for each logic element is connected to a subset of the routing lines within the LAB using a specific pattern of connectivity of multiplexers to associated wires that maximizes the efficiency of use of the routing wires. Control signals for the set of logic elements within the LAB are generated using a secondary signal generation unit that minimizes contention for shared signals. One of the control signals is an “add-or-subtract control signal” that allows all of the LEs in a LAB to perform either addition or subtraction under the control of a logic signal. In a PLD supporting redundancy, the carry chain for the LABs is arranged in the same direction that redundancy shifts to remap defective LABs and a multiplexer on the carry input of a LAB is used to select the appropriate carry output from another LAB depending on whether redundancy is engaged.

    FRACTURABLE LOOKUP TABLE AND LOGIC ELEMENT
    38.
    发明申请
    FRACTURABLE LOOKUP TABLE AND LOGIC ELEMENT 有权
    可折叠的表和逻辑元件

    公开(公告)号：US20070222477A1

    公开(公告)日：2007-09-27

    申请号：US11753048

    申请日：2007-05-24

    Applicant: David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

    Inventor： David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

    IPC: H03K19/177

    CPC classification number: H03K19/17728 ,  H03K19/1737

    Abstract: A logic element includes memory elements, multiplexers, and controls. The multiplexers are arranged in levels including a highest level of multiplexes with inputs connected to the memory elements and outputs connected to inputs of a next-to-highest level of multiplexers and a first level of multiplexers with inputs connected to outputs of a second level of multiplexers and at least one output. The controls are connected to the multiplexers. In a first operational mode the controls determine a first-mode output at the at least one output of the first level of multiplexers, and in a second operational mode the controls determine a plurality of second-mode outputs at selected outputs of multiplexers not at the first level of multiplexers.

    Abstract translation: 逻辑元件包括存储器元件，多路复用器和控制器。 多路复用器被布置成包括具有连接到存储器元件的输入的最高级复用的输出和连接到下一个到最高级多路复用器的输出的输出以及具有连接到第二级的多路复用器的输出的第一级多路复用器 多路复用器和至少一个输出。 控制器连接到多路复用器。 在第一操作模式中，所述控制确定所述第一级多路复用器的所述至少一个输出处的第一模式输出，并且在第二操作模式中，所述控制确定多路复用器的选定输出处的多个第二模式输出， 第一级多路复用器。

    Distributed memory in field-programmable gate array integrated circuit devices
    39.
    发明申请
    Distributed memory in field-programmable gate array integrated circuit devices 有权
    现场可编程门阵列集成电路器件中的分布式存储器

    公开(公告)号：US20070146178A1

    公开(公告)日：2007-06-28

    申请号：US11320253

    申请日：2005-12-27

    Applicant: David Lewis ,  Paul Leventis ,  Vaughn Betz ,  Thomas Wong ,  Andy Lee ,  Philip Pan

    Inventor： David Lewis ,  Paul Leventis ,  Vaughn Betz ,  Thomas Wong ,  Andy Lee ,  Philip Pan

    IPC: H03M7/00

    CPC classification number: G11C7/1045 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1776

    Abstract: Circuitry for facilitating the use of the memory elements in the look-up tables (“LUTs”) of a field programmable gate array (“FPGA”) as user-accessible, distributed RAM. For example, a register associated with a LUT and that is not needed in the read data path in user RAM mode can be used to register data for writing in user RAM mode. As another example, an otherwise unneeded register associated with a LUT can be used to provide a synchronous read address signal for user RAM mode. Several other features are shown for similarly facilitating user RAM mode with minimal (if any) additional circuitry being required in the FPGA.

    Abstract translation: 用于便于将现场可编程门阵列（“FPGA”）的查找表（“LUT”）中的存储元件用作用户可访问的分布式RAM的电路。 例如，可以使用与用户RAM模式中的与LUT相关联并且在读取数据路径中不需要的寄存器来登记用于用户RAM模式的写入数据。 作为另一示例，可以使用与LUT相关联的另外不需要的寄存器来提供用于用户RAM模式的同步读取地址信号。 显示了几个其他功能，用于在FPGA中需要最少（如果有的话）附加电路的同时方便用户RAM模式。

    WIDE-LANE PSEUDORANGE MEASUREMENTS USING FM SIGNALS
    40.
    发明申请
    WIDE-LANE PSEUDORANGE MEASUREMENTS USING FM SIGNALS 有权
    使用FM信号进行宽域PSEUDORANGE测量

    公开(公告)号：US20070131079A1

    公开(公告)日：2007-06-14

    申请号：US11554765

    申请日：2006-10-31

    Applicant: Guttorm Opshaug ,  David Burgess ,  George Flammer ,  Scott Furman ,  Andy Lee ,  Matthew Rabinowitz ,  Harvind Samra

    Inventor： Guttorm Opshaug ,  David Burgess ,  George Flammer ,  Scott Furman ,  Andy Lee ,  Matthew Rabinowitz ,  Harvind Samra

    IPC: G10H3/18

    CPC classification number: G01S11/02 ,  G01S5/0263 ,  G01S5/12

    Abstract: Apparatus having corresponding methods and computer-readable media comprises a receiver to receive a wireless stereo frequency-modulation (FM) signal comprising a plurality of spectral signal components including a first tone and one or more frequency bands; one or more tone generators each to generate a respective second tone based on a respective one of the frequency bands; a plurality of phase circuits each to measure a phase of a respective one of the first and second tones; and a difference element to determine a phase difference between two of the phases.

    Abstract translation: 具有相应方法和计算机可读介质的装置包括：接收器，用于接收包括包括第一音调和一个或多个频带的多个频谱信号分量的无线立体声调频（FM）信号; 一个或多个音调发生器，每个音调发生器基于相应的一个频带产生相应的第二音调; 多个相位电路，各自测量第一和第二音调中的相应一个的相位; 以及差分元件，以确定两相之间的相位差。

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