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公开(公告)号：US11287839B2
公开(公告)日：2022-03-29
申请号：US16583008
申请日：2019-09-25
Applicant: Apple Inc.
Inventor： Sujan K. Manohar , Jay B. Fletcher , Nathan F. Hanagami
Abstract: A dual loop LDO voltage regulator is disclosed. The voltage regulator circuit includes a first current mirror having first and second transistors having source terminals coupled to an input voltage node. The circuit further includes a second current mirror having third and fourth transistors, wherein drain terminals of the third and fourth transistors are coupled to drain terminals of the first and second transistors, respectively. A feedback circuit is coupled between source terminals of the third and fourth transistors, and is configured to generate a feedback signal based on a reference voltage and an output voltage present on the source terminal of the fourth transistor. The first and second current mirrors form a first control loop, and wherein the first and second current mirrors and the feedback circuit form a second control loop.
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公开(公告)号：US20220075402A1
公开(公告)日：2022-03-10
申请号：US17017639
申请日：2020-09-10
Applicant: Apple Inc.
Inventor： Ruopeng Wang , Jay B. Fletcher
Abstract: A voltage regulator circuit includes a switch device that is coupled between an input power supply and a regulated power supply node. The voltage regulator circuit adjusts a value of a current flowing from the input power supply to the regulated power supply node by modifying a voltage level of a control node coupled to the switch device. A control circuit adjusts the voltage level of the control node using an error signal based on a comparison of the voltage level of the regulated power supply node and a reference voltage. To improve the response time of the voltage regulator circuit to changes in load current, the control circuit additionally sources current to and/or sinks current from the control node based on a voltage level of the control node.
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公开(公告)号：US11144110B2
公开(公告)日：2021-10-12
申请号：US16039842
申请日：2018-07-19
Applicant: Apple Inc.
Inventor： Jay B. Fletcher , Karthik Manickam , Bo Yang , Vincent R. von Kaenel , Shawn Searles , Hubert Attah , Nir Dahan , Olivier Girard
IPC: G06F1/32 , G06F1/3296 , G01R31/28 , G06F1/3206
Abstract: A voltage regulator circuit included in a computer system may generate a voltage level on a power supply signal using a source power supply signal and based initial values of one or more operation parameters derived from wafer-level test data. One or more operation characteristics of the voltage regulator circuit may be sampled, by a measurement circuit, at multiple time points to generated measurement data. A control circuit may adapt operation of the voltage regulator circuit based on the measurement data.
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公开(公告)号：US20210234463A1
公开(公告)日：2021-07-29
申请号：US17140919
申请日：2021-01-04
Applicant: Apple Inc.
Inventor： Jay B. Fletcher
IPC: H02M3/158
Abstract: A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.
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公开(公告)号：US20200280256A1
公开(公告)日：2020-09-03
申请号：US16290769
申请日：2019-03-01
Applicant: Apple Inc.
Inventor： Dingkun Du , Michael B. Nussbaum , Jitendra K. Agrawal , Floyd L. Dankert , Jay B. Fletcher
IPC: H02M3/158 , G06F1/28 , G06F1/3296
Abstract: A voltage regulator circuit included in a computer system may include multiple devices and a switch node coupled to a regulated power supply node via an inductor. The voltage regulator circuit may charge a capacitor using an input power supply signal, and couple the capacitor to the switch node using respective subsets of the multiple devices, which are selected based on one or more control signals. A control circuit may generate the one or more control signals based on a particular switching sequence, which is selected based on a ratio of a voltage level of the regulated power supply node and a voltage level input power supply signal.
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Patent Agency Ranking
36.发明授权公开(公告)号：US10520970B2
公开(公告)日：2019-12-31
申请号：US14870661
申请日：2015-09-30
Applicant: Apple Inc.
Inventor： Jay B. Fletcher , Shawn Searles , Fabio Gozzini , Sanjay Pant
Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to a common output node. Each of the phase units may be configured to source current to the output node in response to the assertion of a respective clock signal in order to generate a regulated supply voltage. Each phase unit includes a respective transconductance amplifier configured to generate a respective demand current dependent upon a reference voltage and the regulated supply voltage.
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公开(公告)号：US20180083532A1
公开(公告)日：2018-03-22
申请号：US15402827
申请日：2017-01-10
Applicant: Apple Inc.
Inventor： Fabio Gozzini , Jay B. Fletcher , Shawn Searles , Sanjay Pant
CPC classification number: H02M3/156 , H02M1/08 , H02M3/1584 , H02M2001/0003 , H02M2001/0009 , H02M2001/0025 , H02M2001/0064 , H02M2003/1586
Abstract: A system that includes a regulator circuit is disclosed. The regulator circuit includes first and second phase units whose outputs are coupled to a power supply node of a circuit block, via respective coupled inductors. The first phase unit may initiate a charge cycle of the power supply node in response to assertion of a clock signal and generate a compensated current using currents measure through both inductors and the clock signal. In response to a determination that the compensated current is greater than a demand current generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.
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公开(公告)号：US20240258924A1
公开(公告)日：2024-08-01
申请号：US18634182
申请日：2024-04-12
Applicant: Apple Inc.
Inventor： Sujan K. Manohar , Jay B. Fletcher
Abstract: In some embodiments, a power converter circuit included in a computer system magnetizes and de-magnetizes an inductor coupled to a switch node using high-side and low-side switches to alternatively couple a switch node to an input power supply node and a ground supply node. In response to detecting a drop in the voltage level of the input power supply node, the power converter circuit may adjust an on-resistance of the high-side switch to maintain performance at the lower voltage level of the input power supply node.
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公开(公告)号：US11742761B2
公开(公告)日：2023-08-29
申请号：US17823027
申请日：2022-08-29
Applicant: Apple Inc.
Inventor： Jay B. Fletcher
IPC: H02M3/158
CPC classification number: H02M3/1584 , H02M3/07 , H02M1/04 , H02M3/158 , H02M1/08
Abstract: A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.
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40.发明授权公开(公告)号：US11736017B2
公开(公告)日：2023-08-22
申请号：US17482215
申请日：2021-09-22
Applicant: Apple Inc.
Inventor： Chongli Cai , Hao Zhou , Jay B. Fletcher
CPC classification number: H02M3/1586 , H02M1/0009 , H02M3/157
Abstract: A power converter circuit that includes multiple phase circuits may employ coupled inductors to generate a particular voltage level on a regulated power supply node. Based on a comparison of a voltage level of the regulated power supply node and a reference voltage, the power converter circuit may initiate an active period, during which the phase circuits source respective currents to the regulated power supply node via corresponding coils included in the coupled inductor. After a time period has elapsed following an initiation of the active period, the operation of the phase circuits is adjusted so that the respective currents flowing in the coils of the coupled inductor are out of phase.
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