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公开(公告)号：US20240251636A1
公开(公告)日：2024-07-25
申请号：US18005676
申请日：2022-02-28
Inventor： XinXin Wang , Dacheng Zhang , Ning Liu , Yu Wang , Bin Zhou , Can Yuan
IPC: H10K59/80 , H10K59/12 , H10K59/124
CPC classification number: H10K59/80522 , H10K59/1201 , H10K59/124
Abstract: An OLED display panel includes a base substrate and an OLED device on the base substrate. The OLED device includes: an auxiliary electrode in the non-light-emitting region, the auxiliary electrode includes a conductive layer and a conductive column on a side of the conductive layer away from the base substrate, and an orthographic projection of the conductive column on the base substrate is within an orthographic projection of the conductive layer on the base substrate; and an insulating layer between the conductive layer and the base substrate; a groove is arranged on a surface of the insulating layer away from the base substrate, and an orthographic projection of the groove on the base substrate at least partially overlaps with the orthographic projection of the isolation structure on the base substrate.
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公开(公告)号：US11963397B2
公开(公告)日：2024-04-16
申请号：US17280725
申请日：2020-05-15
Inventor： Meng Li , Yongqian Li , Jingquan Wang , Chen Xu , Dacheng Zhang , Zhidong Yuan , Can Yuan , Xuehuan Feng
IPC: H10K59/121 , H10K59/126 , H10K59/131 , H10K59/38 , H10K71/00 , H10K59/12
CPC classification number: H10K59/121 , H10K59/1216 , H10K59/126 , H10K59/131 , H10K59/38 , H10K71/00 , H10K59/1201
Abstract: A display region includes a plurality of pixel driving circuitry setting regions arranged sequentially in a first direction, and each pixel driving circuitry setting region extends in a second direction intersecting the first direction. Each display circuitry includes a plurality of subpixels in one-to-one correspondence with the pixel driving circuitry setting regions, each subpixel includes a subpixel driving circuitry and a light-emitting element coupled to each other, the subpixel driving circuitry is located in a corresponding pixel driving circuitry setting region, the light-emitting element is located at a side of the subpixel driving circuitry away from the substrate, a width of the light-emitting element is greater than a width of the corresponding pixel driving circuitry setting region in the first direction, and a length of the light-emitting element is smaller than a length of the corresponding pixel driving circuitry setting region in the second direction.
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公开(公告)号：US11581372B2
公开(公告)日：2023-02-14
申请号：US16977510
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Zhidong Yuan , Dacheng Zhang , Lang Liu
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a storage capacitor. The storage capacitor includes a second capacitor electrode, a first capacitor electrode and a third capacitor electrode which are sequentially on the base substrate. The first capacitor electrode has a first capacitor electrode side and a second capacitor electrode side opposite to each other in the second direction, and the second capacitor electrode has a third capacitor electrode side and a fourth capacitor electrode side opposite to each other in the second direction; orthographic projections of the first capacitor electrode side and the second capacitor electrode side on the base substrate are between an orthographic projection of the third capacitor electrode side and an orthographic projection of the fourth capacitor electrode side on the base substrate.
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公开(公告)号：US11476310B2
公开(公告)日：2022-10-18
申请号：US16977512
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Meng Li , Zhidong Yuan , Dacheng Zhang , Lang Liu
Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels which are arranged in a sub-pixel array in a first direction and a second direction. At least one sub-pixel includes a first transistor, a second transistor, a third transistor, and a storage capacitor. An active layer of the third transistor includes a body region and a first via hole region successively arranged in the first direction and electrically connected with each other; a first electrode of the third transistor is electrically connected to the first via hole region through a first via hole which is shifted in the second direction with respect to the body region, allowing the active layer incudes a first active layer side connecting the body region and the first via hole region; an extension direction of the first active layer side intersects with both the first direction and the second direction.
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公开(公告)号：US11469290B2
公开(公告)日：2022-10-11
申请号：US17040260
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Meng Li , Zhidong Yuan , Xuehuan Feng , Lang Liu , Dacheng Zhang
Abstract: The present disclosure relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a display panel. In the array substrate, a substrate is provided with a first transistor and a second transistor, a first electrode of the first transistor is electrically connected to a gate of the second transistor; a conductive layer is disposed on the substrate, and includes a first conductor portion, a first semiconductor portion, a second conductor portion that are sequentially connected along a first direction; a first gate insulating layer is disposed on a side of the conductive layer away from the substrate; a first gate layer is disposed on a side of the first gate insulating layer away from the substrate to form the gate of the second transistor; a dielectric layer is disposed on the substrate to cover a part of the first conductor portion, a part of the second conductor portion and a part of the first gate layer, and an orthographic projection of a first via hole disposed on the dielectric layer on the substrate overlaps with orthographic projections of at least a part of the first conductor portion, at least a part of the second conductor portion and the first gate layer on the substrate; and a first source/drain layer is disposed on a side of the dielectric layer away from the substrate to cover the first via hole.
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Patent Agency Ranking
公开(公告)号：US11444132B2
公开(公告)日：2022-09-13
申请号：US16976827
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Zhidong Yuan , Meng Li , Dacheng Zhang , Lang Liu
Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor, a third transistor, and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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公开(公告)号：US11315960B2
公开(公告)日：2022-04-26
申请号：US16097875
申请日：2018-03-14
Inventor： Can Yuan , Zhenfei Cai , Yongqian Li , Pan Xu , Zhidong Yuan , Meng Li , Xuehuan Feng
IPC: H01L27/12 , H01L29/786 , H01L27/32
Abstract: A thin film transistor structure and a manufacturing method thereof, a circuit structure, a display substrate and a display device are provided. The thin film transistor structure includes: a base plate, and a first thin film transistor and a second thin film transistor stacked on the base plate. The first thin film transistor and the second thin film transistor share a same active layer.
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公开(公告)号：US11296162B2
公开(公告)日：2022-04-05
申请号：US16638556
申请日：2019-09-04
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
Abstract: An array substrate includes a base substrate (1); a driving transistor (2) on the base substrate (1); an insulating layer (3) on the driving transistor (2), the insulating layer (3) comprising a via hole above a first electrode (21) of the driving transistor (2); a conductive portion (4) on the insulating layer (3); and a light emitting device (6) on the conductive portion (4) and electrically connected to the conductive portion (4). The conductive portion (4) may be electrically connected to the first electrode (21) of the driving transistor (2) through the via hole. The light emitting device (6) may be above the via hole, and an orthographic projection of the light emitting device (6) on the base substrate (1) may cover an orthographic projection of the via hole on the base substrate (1).
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公开(公告)号：US11282915B2
公开(公告)日：2022-03-22
申请号：US16963975
申请日：2019-09-10
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3233 , H01L27/32 , G09G3/00
Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixel units arranged in an array, and the array includes N rows and 8M columns. Sub-pixel units in each row are divided into a plurality of sub-pixel unit groups, and each sub-pixel unit group includes a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit, a fourth sub-pixel unit, a fifth sub-pixel unit, a sixth sub-pixel unit, a seventh sub-pixel unit and an eighth sub-pixel unit which are sequentially in eight adjacent columns along a first direction.
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公开(公告)号：US11238805B2
公开(公告)日：2022-02-01
申请号：US16766450
申请日：2019-11-04
Inventor： Xuehuan Feng , Yongqian Li , Can Yuan , Meng Li , Zehua Ding , Zhidong Yuan
IPC: G09G5/00 , G09G3/3266 , G09G3/3225 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-unit and a leakage prevention circuit; the first sub-unit includes a first input circuit and a first output circuit. The first input circuit controls a level of a first node in response to a first input signal, the first output circuit provides an output signal at an output terminal under control of the level of the first node, the leakage prevention circuit is connected to the first node and a first voltage terminal, and controls a level of a leakage prevention node under control of the level of the first node, whereby a conductive path is formed between the leakage prevention node and the first voltage terminal, and a circuit connected between the first node and the leakage prevention node is turned off.
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