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公开(公告)号：US20190181155A1
公开(公告)日：2019-06-13
申请号：US16049958
申请日：2018-07-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yunfei Li , Lujiang Huangfu , Yipeng Chen , Jianchao Zhu
IPC: H01L27/12 , H01L29/786
Abstract: A display substrate and a manufacturing method thereof, and a display panel are provided. The display substrate includes at least one set of signal lines and at least one shielding structure disposed on a base substrate. The shielding structure is electrically connected to a DC power source. The shielding structure includes a shielding portion. Each set of signal lines includes a first signal line and a second signal line at different layers. Orthographic projections of first signal line and second signal line on base substrate overlap and have an overlapping region. Shielding portion is located between the first signal line and the second signal line, and insulated from the two signal lines. An orthographic projection of the shielding portion on base substrate at least partially overlaps the overlapping region. Since voltage on shielding structures is stable, thereby effectively avoiding crosstalk between the two signal lines in set of signal lines.
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公开(公告)号：US12295226B2
公开(公告)日：2025-05-06
申请号：US17762692
申请日：2021-04-15
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yipeng Chen , Lujiang Huangfu , Libin Liu
IPC: H01L27/32 , H10K59/121 , H10K59/126 , H10K59/131 , H10K59/12
Abstract: The present disclosure provides a display panel and a method of manufacturing the same and a display device. In a sub-pixel driving circuit of the display panel, a gate electrode of a driving transistor is coupled to a second electrode of a second transistor through a fourth conductive connection portion, and a second electrode plate of a storage capacitor is coupled to a second electrode of a first transistor through a third conductive connection portion, a gate electrode of the first transistor and a gate electrode of the second transistor are respectively coupled to a gate line pattern in the corresponding sub-pixel area; orthographic projection of the gate line pattern on the substrate does not overlap orthographic projection of the third conductive connecting portion on the substrate, and/or does not overlap orthographic projection of the fourth conductive connection portion on the substrate.
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公开(公告)号：US20250069548A1
公开(公告)日：2025-02-27
申请号：US18941520
申请日：2024-11-08
Inventor： Yipeng Chen , Ling Shi , Weifeng Zhou
IPC: G09G3/3233
Abstract: A pixel circuit and a display apparatus are provided. The pixel circuit includes: a driving circuit, a data writing circuit, a compensation circuit, a light emission control circuit, a first reset circuit, a second reset circuit, and a light-emitting element, wherein the driving circuit includes a control end, a first end and a second end; the data writing circuit is used for writing a data signal into the first end of the driving circuit under the control of a writing control signal; the first reset circuit is used for applying a first reset voltage to the control end of the driving circuit under the control of a first reset control signal; and the second reset circuit is used for applying a second reset voltage to a first electrode of the light-emitting element under the control of a second reset control signal.
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公开(公告)号：US12165597B2
公开(公告)日：2024-12-10
申请号：US18020971
申请日：2022-01-29
Inventor： Yipeng Chen , Hui Lu , Ling Shi
IPC: G09G3/3266 , G11C19/28 , H01L27/12
Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a gate driving circuit including shift register units and clock signal lines including a first clock signal line, a second clock signal line providing a second clock signal, and a third clock signal line providing a third clock signal. An input circuit of a n-th stage shift register unit in the shift register units is connected with the first clock signal line, a first control circuit of the n-th stage shift register unit is connected with the first clock signal line, the second clock signal line, and the third clock signal line, a second control circuit of the n-th stage shift register unit is connected with the second clock signal line, and a phase of the second clock signal is opposite to a phase of the third clock signal.
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公开(公告)号：US20240221646A1
公开(公告)日：2024-07-04
申请号：US18289108
申请日：2022-08-02
Inventor： Yipeng Chen , Ling Shi , Weifeng Zhou
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2320/0247 , G09G2330/021
Abstract: A pixel circuit, a display apparatus, and a driving method. The pixel circuit include: a driving circuit, a data writing circuit, a compensation circuit, a light emission control circuit, a first reset circuit, a second reset circuit, and a light-emitting element. The data writing circuit is for writing a data signal into the first terminal of the driving circuit based on a writing control signal; the first reset circuit is for applying a first reset voltage to the control terminal of the driving circuit based on a first reset control signal; and the second reset circuit is for applying a second reset voltage to a first electrode of the light-emitting element based on a second reset control signal. The writing control signal and the second reset control signal are synchronized in each write frame, and the writing control signal remains at an invalid level in each skip frame.
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Patent Agency Ranking
公开(公告)号：US11950468B2
公开(公告)日：2024-04-02
申请号：US17762975
申请日：2021-04-15
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yipeng Chen , Lujiang Huangfu , Libin Liu
IPC: H10K59/131 , G09G3/3225 , H10K59/121 , H10K71/00 , H10K59/12 , H10K59/35
CPC classification number: H10K59/131 , G09G3/3225 , H10K59/1213 , H10K59/1216 , H10K71/00 , G09G2300/0426 , G09G2300/0465 , G09G2300/0842 , H10K59/1201 , H10K59/351
Abstract: The present disclosure provides a display panel, a method of manufacturing the same, and a display device. The initialization signal line layer in the display panel includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas; the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled.
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公开(公告)号：US11900880B2
公开(公告)日：2024-02-13
申请号：US17595039
申请日：2021-02-07
Inventor： Ke Liu , Ling Shi , Yipeng Chen , Hui Lu , Shuai Xie , Zhu Wang , Zhenhua Zhang
IPC: G09G3/3258 , H10K59/131 , H10K59/121
CPC classification number: G09G3/3258 , H10K59/121 , H10K59/131 , G09G2320/0686
Abstract: A display substrate, a display panel and a display apparatus are provided. The display substrate includes a base substrate, a first display region, and a second display region, and a light transmittance of the first display region is greater than that of the second display region A plurality of sub-pixels are arranged on the base substrate and in the first display region, wherein the sub-pixels include a first pixel driving circuit and a first light-emitting device, and the first pixel driving circuit includes a compensation transistor, a switching transistor, and a light-emitting device initialization transistor each having an active layer. A scan signal line is provided in the first display region. An orthographic projection of the scan signal line on the base substrate overlaps with that of the active layer of each of the compensation transistor, the switching transistor and the light-emitting device initialization transistor on the base substrate.
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公开(公告)号：US11900860B2
公开(公告)日：2024-02-13
申请号：US17328035
申请日：2021-05-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yipeng Chen , Ling Shi
CPC classification number: G09G3/32 , H01L27/124 , G09F9/33 , G09G3/20 , G09G2300/0426 , G09G2330/06
Abstract: The present application discloses a display panel, a display apparatus, and a display panel manufacturing method. The display panel includes a main display region and a sub display region, where the sub display region is fully-surrounded or half-surrounded by the main display region, the sub display region includes a substrate, a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a dielectric layer, a third metal layer, and a flat layer stacked successively. A signal line of the first metal layer is used to transmit a scan signal of the main display region, and a signal line of the third metal layer is used to transmit a display data signal of the sub display region; the second metal layer is used as an isolation layer for isolating signal interference between the first metal layer and the second metal layer.
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公开(公告)号：US20240023375A1
公开(公告)日：2024-01-18
申请号：US18372884
申请日：2023-09-26
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yipeng Chen , Li Wang , Lujiang Huangfu
IPC: H10K59/121 , G09G3/3291 , H10K59/126
CPC classification number: H10K59/1216 , G09G3/3291 , H10K59/126 , H10K59/1213
Abstract: An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a shielding portion. The shielding portion is between the second capacitor plate and the first data line in a direction perpendicular to the base substrate, and an orthographic projection of the shielding portion on the base substrate at least partially overlap an orthographic projection of the first data line on the base substrate.
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公开(公告)号：US11862216B2
公开(公告)日：2024-01-02
申请号：US17927535
申请日：2021-10-27
Inventor： Zhu Wang , Ling Shi , Yipeng Chen , Hui Lu , Zhenglong Yan , Changchang Liu , Ke Liu
IPC: G11C19/02 , G09G3/3233 , G09G3/3266 , G11C19/28
CPC classification number: G11C19/28 , G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A shift register, comprising an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to transmit a first voltage signal from a first voltage signal terminal to a first node under the control of an input signal from a signal input terminal. The first control circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a second node under the control of a first clock signal from a first clock signal terminal and the voltage of the first node. The second control circuit is configured to transmit a second clock signal from a second clock signal terminal to a third node under the control of the voltage of the second node. The output circuit is configured to transmit the first voltage signal from the first voltage signal terminal to a scan signal output terminal under the control of the voltage of the third node.
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