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公开(公告)号:US20250072225A1
公开(公告)日:2025-02-27
申请号:US18693236
申请日:2023-08-22
Inventor: Yu Wu , Yipeng Chen , Haoyu Li , Yuxiao Li
IPC: H10K59/122 , H10K59/80
Abstract: The present disclosure provides a display substrate. A partition structure is provided between two sub-pixels adjacent to each other, and includes a partition portion and a first groove, and an orthographic projection of the partition portion overlaps partially with an orthographic projection of the first groove. The sub-pixel includes an organic light-emitting device, which includes a charge generation portion. For two adjacent sub-pixels and the partition structure therebetweeen, the charge generation portion of one includes a first extension sub-portion extending between the two sub-pixels, and the charge generation portion of the other includes a second extension sub-portion extending between the two sub-pixels that are insulated and spaced apart from the first extension sub-portion. One of the first extension sub-portion and the second extension sub-portion is on a side of the partition portion away from the base substrate, the other is on a bottom wall of the first groove.
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公开(公告)号:US12178082B2
公开(公告)日:2024-12-24
申请号:US18372884
申请日:2023-09-26
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yipeng Chen , Li Wang , Lujiang Huangfu
IPC: H01L29/08 , G09G3/3291 , H10K59/121 , H10K59/126
Abstract: An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a shielding portion. The shielding portion is between the second capacitor plate and the first data line in a direction perpendicular to the base substrate, and an orthographic projection of the shielding portion on the base substrate at least partially overlap an orthographic projection of the first data line on the base substrate.
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公开(公告)号:US20240282781A1
公开(公告)日:2024-08-22
申请号:US18650445
申请日:2024-04-30
Inventor: Ling Shi , Yipeng Chen , Ke Liu , Fei Fang , Zhenhua Zhang , Xuewei Tian
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1259
Abstract: Provided is a display substrate. The display substrate includes including a base substrate having a first display region and a second display region; in the pixel circuit included in the pixels in the second display region, the conductive line connected to the metal layer is a transparent conductive line, and the transparent conductive line is disposed between the two existing insulating layers.
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公开(公告)号:US11950456B2
公开(公告)日:2024-04-02
申请号:US17437936
申请日:2020-10-27
Inventor: Yipeng Chen , Ling Shi , Wenqiang Li , Shuai Xie , Yang Yu
IPC: H10K59/121 , H10K59/131
CPC classification number: H10K59/1213 , H10K59/131
Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.
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公开(公告)号:US11925087B2
公开(公告)日:2024-03-05
申请号:US17426649
申请日:2020-10-29
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yipeng Chen , Ling Shi , Ke Liu , Zhenhua Zhang
IPC: H10K59/179 , H10K50/822 , H10K71/00 , H10K59/12 , H10K59/122 , H10K59/173
CPC classification number: H10K59/179 , H10K50/822 , H10K71/00 , H10K59/1201 , H10K59/122 , H10K59/173
Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes: a first display region and a second display region; the first display region includes a plurality of first pixels, the first pixel includes a passive light-emitting device, the second display region includes a plurality of second pixels, the second pixel includes an active light-emitting device and a pixel drive circuit electrically connected to the active light-emitting device. The first display region further includes a plurality of first cathode blockers, and the first cathode blocker includes at least one first groove, wherein the first cathode blocker is provided between at least two adjacent columns of first pixels, to make the cathodes of the two adjacent columns of first pixels disconnected.
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公开(公告)号:US11925067B2
公开(公告)日:2024-03-05
申请号:US17271249
申请日:2020-05-11
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yang Yu , Yipeng Chen , Ling Shi , Jingquan Wang
IPC: G09G3/3233 , G09G3/3258 , H01L27/12 , H10K59/121 , H10K59/131 , H10K59/35
CPC classification number: H10K59/1216 , G09G3/3233 , G09G3/3258 , H01L27/1255 , H10K59/1213 , H10K59/131 , H10K59/353
Abstract: Disclosed are a display panel and a display device. The display panel includes a base substrate including a plurality of sub-pixels, at least one of the plurality of sub-pixels including a pixel circuit; a first conductive layer located on a side, facing away from the base substrate, of a first insulating layer; a second insulating layer located on a side, facing away from the base substrate, of the first conductive layer; a second conductive layer located on a side, facing away from the base substrate, of the second insulating layer; a fourth insulating layer located on a side, facing away from the base substrate, of the second conductive layer; and a third conductive layer located on a side, facing away from the base substrate, of the fourth insulating layer, the third conductive layer including a plurality of data wires arranged at intervals.
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公开(公告)号:US11837169B2
公开(公告)日:2023-12-05
申请号:US17744709
申请日:2022-05-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Yipeng Chen , Libin Liu , Lujiang Huangfu
IPC: G09G3/3258 , G09G3/20 , G09G3/3291 , G09G3/3233
CPC classification number: G09G3/3258 , G09G3/2092 , G09G3/3291 , G09G3/3233 , G09G2300/0819 , G09G2320/045
Abstract: The present disclosure provides a pixel circuit including: a driving transistor and a voltage control circuit; wherein in the voltage control circuit, at least one transistor directly coupled to a gate of the driving transistor is an oxide thin film transistor. The disclosure also provides a display substrate and a display apparatus.
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公开(公告)号:US20230363222A1
公开(公告)日:2023-11-09
申请号:US18354028
申请日:2023-07-18
Inventor: Ling Shi , Yipeng Chen , Xuewei Tian , Ke Liu , Dan Guo , Zhenhua Zhang
IPC: H10K59/131 , G09G3/3241 , H10K59/65 , H10K59/122 , H10K59/121
CPC classification number: H10K59/131 , G09G3/3241 , H10K59/65 , H10K59/122 , H10K59/1216 , G09G2300/0465 , G09G2300/0819 , G09G2300/0842 , G09G2360/14 , H01L27/124
Abstract: A display substrate is provided, including: a base substrate and a plurality of sub-pixels disposed on the base substrate. Each sub-pixel includes a pixel driving circuit, and the pixel driving circuit includes a writing transistor, a compensation transistor, a first reset transistor, and a storage capacitor. The display substrate includes a semiconductor layer, a first conductive layer and a second conductive layer disposed in sequence on the base substrate. Gates of the writing transistor, the compensation transistor and the first reset transistor are in the first conductive layer and are implemented as an integral structure. Active layers of the writing transistor, the compensation transistor and the first reset transistor are in the semiconductor layer. A first storage capacitor electrode of the storage capacitor is in the first conductive layer, and a second storage capacitor electrode of the storage capacitor is in the second conductive layer.
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公开(公告)号:US11751460B2
公开(公告)日:2023-09-05
申请号:US17762962
申请日:2021-04-15
Applicant: BOE Technology Group Co., Ltd.
Inventor: Yipeng Chen , Lujiang Huangfu , Libin Liu
IPC: H10K59/131 , H10K59/35 , G09G3/3233 , H10K59/126 , H10K59/12
CPC classification number: H10K59/353 , G09G3/3233 , H10K59/126 , H10K59/131 , H10K59/352 , G09G2300/0452 , G09G2300/0842 , H10K59/1201
Abstract: A display panel, a method of manufacturing the same, and a display device are provided. In the display panel, sub-pixel areas in a same row along a first direction are divided into a plurality of sub-pixel area groups independent from each other, and each sub-pixel area group includes at least two adjacent sub-pixel areas, a connection layer includes a connection pattern arranged in each sub-pixel area, and the connection pattern is coupled to the initialization signal line pattern in the sub-pixel area wherein the connection pattern is located, connection patterns located in a same sub-pixel area group are sequentially coupled along the first direction to form the connection portion; at least part of a first auxiliary signal line layer is located in an anode spacing area, and is insulated from an anode pattern, the connection pattern in each sub-pixel area group is coupled to the first auxiliary signal line layer.
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公开(公告)号:US20230165052A1
公开(公告)日:2023-05-25
申请号:US17637340
申请日:2021-02-24
Inventor: Changchang Liu , Ling Shi , Ke Liu , Yipeng Chen , Zhenhua Zhang , Hu Lu
IPC: H10K59/121 , H10K59/131 , H10K59/122 , H10K59/65
CPC classification number: H10K59/1213 , H10K59/131 , H10K59/122 , H10K59/65 , H10K59/1216
Abstract: Provided is a display panel, including: a base substrate provided with a first display region and a second display region; a first auxiliary electrode layer, a first anode layer, a first light-emitting layer and a first cathode layer that are sequentially laminated, in a direction away from the base substrate, in the first display region; and a second auxiliary electrode layer, a second anode layer, a second light-emitting layer, and a second cathode layer that are sequentially laminated, in the direction away from the base substrate, in the second display region; wherein the first auxiliary electrode layer is connected to the first cathode layer and the second auxiliary electrode layer, and the second cathode layer is connected to the first cathode layer, the second cathode layer is provided with at least one hollowed-out region.
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