ARRAY SUBSTRATE AND DISPLAY DEVICE
    32.
    发明公开

    公开(公告)号:US20240008329A1

    公开(公告)日:2024-01-04

    申请号:US18369930

    申请日:2023-09-19

    CPC classification number: H10K59/131 H10K59/1213

    Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes: a sub-pixel, in a display region and including a light-emitting element, the light-emitting element including a first electrode, a light-emitting layer and a second electrode; a positive power line, connected to the first electrode; a positive power bus, connected to the positive power line; two positive power access ends, at a side of the positive power bus away from a display region, and respectively connected to the positive power bus; a negative power line; an auxiliary electrode, respectively connected to the negative power line and the second electrode; four negative power access ends, at the side of the positive power bus away from the display region, and respectively connected to the negative power line; and a negative power auxiliary line, respectively connected to the negative power access end and the auxiliary electrode.

    Electroluminescent display panel and display device

    公开(公告)号:US11462593B2

    公开(公告)日:2022-10-04

    申请号:US16954924

    申请日:2019-07-31

    Abstract: The present disclosure discloses an electroluminescent display panel and a display device. The electroluminescent display panel includes a plurality of repeat units, each of the plurality of repeat units includes a plurality of sub-pixels, and each of the plurality of sub-pixels includes: a first conductive layer, located on a substrate; a first insulation layer, located on the first conductive layer and including a first hole, in which the first hole exposes a portion of the first conductive layer; and an anode, located on the first insulation layer and including a main portion and an auxiliary portion which are electrically connected to each other. The auxiliary portion is electrically connected to the first conductive layer through the first hole. In at least one sub-pixel, an orthographic projection of the main portion on the substrate does not overlap an orthographic projection of the first hole on the substrate.

    Array substrate and display device
    35.
    发明授权

    公开(公告)号:US12245481B2

    公开(公告)日:2025-03-04

    申请号:US18369930

    申请日:2023-09-19

    Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes: a sub-pixel, in a display region and including a light-emitting element, the light-emitting element including a first electrode, a light-emitting layer and a second electrode; a positive power line, connected to the first electrode; a positive power bus, connected to the positive power line; two positive power access ends, at a side of the positive power bus away from a display region, and respectively connected to the positive power bus; a negative power line; an auxiliary electrode, respectively connected to the negative power line and the second electrode; four negative power access ends, at the side of the positive power bus away from the display region, and respectively connected to the negative power line; and a negative power auxiliary line, respectively connected to the negative power access end and the auxiliary electrode.

    Array substrate and display apparatus

    公开(公告)号:US12243477B2

    公开(公告)日:2025-03-04

    申请号:US17788581

    申请日:2021-09-17

    Abstract: A pixel driving circuit is provided. The pixel driving circuit includes a driving transistor; a storage capacitor; a first reset transistor having a gate electrode connected to a first gate line in a present stage of a plurality of first gate lines, a source electrode connected to a respective first reset signal line of a plurality of first reset signal lines, and a drain electrode connected to an anode of a light emitting element; and a second reset transistor having a gate electrode connected to a first gate line in a previous stage of the plurality of first gate lines, a source electrode connected to a respective second reset signal line of a plurality of second reset signal lines, and a drain electrode connected to a drain electrode of the driving transistor.

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