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31.发明授权公开(公告)号：US11348026B2
公开(公告)日：2022-05-31
申请号：US16778295
申请日：2020-01-31
Applicant: D-WAVE SYSTEMS INC.
Inventor： Murray C. Thom , Aidan P. Roy , Fabian A. Chudak , Zhengbing Bian , William G. Macready , Robert B. Israel , Kelly T. R. Boothby , Sheir Yarkoni , Yanbo Xue , Dmytro Korenkevych
IPC: G06N10/00
Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
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公开(公告)号：US20210289020A1
公开(公告)日：2021-09-16
申请号：US16336625
申请日：2017-09-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： Jason T. Rolfe , William G. Macready , Mani Ranjbar , Mayssam Mohammad Nevisi
IPC: H04L29/08 , G06F15/173 , G06N7/08 , G06N10/00
Abstract: A digital processor runs a machine learning algorithm in parallel with a sampling server. The sampling sever may continuously or intermittently draw samples for the machine learning algorithm during execution of the machine learning algorithm, for example on a given problem. The sampling server may run in parallel (e.g., concurrently, overlapping, simultaneously) with a quantum processor to draw samples from the quantum processor.
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公开(公告)号：US20210019647A1
公开(公告)日：2021-01-21
申请号：US17030576
申请日：2020-09-24
Applicant: D-WAVE SYSTEMS INC.
Inventor： William G. Macready , Firas Hamze , Fabian A. Chudak , Mani Ranjbar , Jack R. Raymond , Jason T. Rolfe
Abstract: A hybrid computer comprising a quantum processor can be operated to perform a scalable comparison of high-entropy samplers. Performing a scalable comparison of high-entropy samplers can include comparing entropy and KL divergence of post-processed samplers. A hybrid computer comprising a quantum processor generates samples for machine learning. The quantum processor is trained by matching data statistics to statistics of the quantum processor. The quantum processor is tuned to match moments of the data.
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公开(公告)号：US20200257984A1
公开(公告)日：2020-08-13
申请号：US16779035
申请日：2020-01-31
Applicant: D-WAVE SYSTEMS INC.
Inventor： Arash Vahdat , Mani Ranjbar , Mehran Khodabandeh , William G. Macready , Zhengbing Bian
Abstract: The domain adaptation problem is addressed by using the predictions of a trained model over both source and target domain to retain the model with the assistance of an auxiliary model and a modified objective function. Inaccuracy in the model's predictions in the target domain is treated as noise and is reduced by using a robust learning framework during retraining, enabling unsupervised training in the target domain. Applications include object detection models, where noise in retraining is reduced by explicitly representing label noise and geometry noise in the objective function and using the ancillary model to inject information about label noise.
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35.发明申请公开(公告)号：US20200167685A1
公开(公告)日：2020-05-28
申请号：US16778295
申请日：2020-01-31
Applicant: D-WAVE SYSTEMS INC.
Inventor： Murray C. Thom , Aidan P. Roy , Fabian A. Chudak , Zhengbing Bian , William G. Macready , Robert B. Israel , Kelly T. R. Boothby , Sheir Yarkoni , Yanbo Xue , Dmytro Korenkevych
IPC: G06N10/00
Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
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Patent Agency Ranking
公开(公告)号：US10467543B2
公开(公告)日：2019-11-05
申请号：US14920235
申请日：2015-10-22
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Mani Ranjbar , Firas Hamze , Geordie Rose , Suzanne Gildert
Abstract: Quantum processor based techniques minimize an objective function for example by operating the quantum processor as a sample generator providing low-energy samples from a probability distribution with high probability. The probability distribution is shaped to assign relative probabilities to samples based on their corresponding objective function values until the samples converge on a minimum for the objective function. Problems having a number of variables and/or a connectivity between variables that does not match that of the quantum processor may be solved. Interaction with the quantum processor may be via a digital computer. The digital computer stores a hierarchical stack of software modules to facilitate interacting with the quantum processor via various levels of programming environment, from a machine language level up to an end-use applications level.
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公开(公告)号：US09665539B1
公开(公告)日：2017-05-30
申请号：US15419083
申请日：2017-01-30
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Geordie Rose , Thomas F.W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
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公开(公告)号：US09594726B2
公开(公告)日：2017-03-14
申请号：US15190608
申请日：2016-06-23
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Geordie Rose , Thomas F. W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
Abstract translation: 解决计算问题可能包括生成计算问题的逻辑电路表示，将逻辑电路表示编码为离散优化问题，以及使用量子处理器来解决离散优化问题。 可以钳位逻辑电路表示的输出，使得解决方案涉及有效地执行逻辑电路表示，以确定对应于被钳位的输出的输入。 该表示可以是布尔逻辑电路。 离散优化问题可以由一组微型优化问题组成，其中每个微型优化问题从逻辑电路表示编码相应的逻辑门。 量子处理器可以包括多组量子位，每组量子位耦合到相应的退火信号线，使得每组量子位的动态演化独立于其他量子位集合的动态演化被控制。
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公开(公告)号：US09588940B2
公开(公告)日：2017-03-07
申请号：US14676605
申请日：2015-04-01
Applicant: D-Wave Systems Inc.
Inventor： Firas Hamze , James King , Evgeny Andriyash , Catherine McGeoch , Jack Raymond , Jason Rolfe , William G. Macready , Aaron Lott , Murray C. Thom
CPC classification number: G06F17/18 , G06N99/002 , G06N99/005
Abstract: The systems, devices, articles, and methods generally relate to sampling from an available probability distribution. The samples maybe used to create a desirable probability distribution, for instance for use in computing values used in computational techniques including: Importance Sampling and Markov chain Monte Carlo systems. An analog processor may operate as a sample generator, for example by: programming the analog processor with a configuration of the number of programmable parameters for the analog processor, which corresponds to a probability distribution over qubits of the analog processor, evolving the analog processor, and reading out states for the qubits. The states for the qubits in the plurality of qubits correspond to a sample from the probability distribution. Operation of the sampling device may be summarized as including updating a set of samples to include the sample from the probability distribution, and returning the set of samples.
Abstract translation: 系统，设备，物品和方法通常涉及从可用概率分布中的采样。 样本可以用于创建期望的概率分布，例如用于计算技术中使用的计算值，包括：重要性采样和马尔可夫链蒙特卡洛系统。 模拟处理器可以作为采样发生器操作，例如通过以下方式来对模拟处理器进行编程：模拟处理器的可编程参数数量的配置，其对应于模拟处理器的量子位上的概率分布，演进模拟处理器， 并读出量子位的状态。 多个量子位中的量子位的状态对应于来自概率分布的样本。 采样装置的操作可以被概括为包括更新一组样本以包括来自概率分布的样本，并返回该组样本。
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公开(公告)号：US20160371227A1
公开(公告)日：2016-12-22
申请号：US15190608
申请日：2016-06-23
Applicant: D-Wave Systems Inc.
Inventor： William G. Macready , Geordie Rose , Thomas F.W. Mahon , Peter Love , Marshall Drew-Brook
CPC classification number: G06F17/505 , B82Y10/00 , G06F17/11 , G06N99/002
Abstract: Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a Boolean logic circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A quantum processor may include multiple sets of qubits, each set coupled to respective annealing signal lines such that dynamic evolution of each set of qubits is controlled independently from the dynamic evolutions of the other sets of qubits.
Abstract translation: 解决计算问题可能包括生成计算问题的逻辑电路表示，将逻辑电路表示编码为离散优化问题，以及使用量子处理器来解决离散优化问题。 可以钳位逻辑电路表示的输出，使得解决方案涉及有效执行逻辑电路表示，以确定对应于被钳位的输出的输入。 该表示可以是布尔逻辑电路。 离散优化问题可以由一组微型优化问题组成，其中每个微型优化问题从逻辑电路表示编码相应的逻辑门。 量子处理器可以包括多组量子位，每组量子位耦合到相应的退火信号线，使得每组量子位的动态演化独立于其他量子位集合的动态演化被控制。
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