Abstract:
Embodiments of the present application provide a resource processing method, an apparatus, and a terminal. The method includes: receiving, by a first terminal, a first message simultaneously sent by each of at least one second terminal, where the first message is carried on N resources and used to indicate location information of resources on which to-be-sent data is located, and N is a positive integer greater than or equal to 2; and determining, by the first terminal based on the location information of the resources on which the to-be-sent data is located, resources used by the first terminal to send data. Because the first message is carried on the N resources, a probability of collision of the resources used by the second terminal to send the first message is very low.
Abstract:
A superposition operation circuit and a float-voltage digital-to-analog conversion circuit to superpose analog elements according to an indirect current superposition principle, where a voltage follower is implemented using a first operational amplifier such that an output end of the voltage follower is clamped to a voltage that is input to a positive-phase input end, namely, a to-be-superposed analog element. Then a current generation circuit converts a voltage signal to a current signal, a voltage drop for the current signal is generated on a first resistor coupled to an output end of the first operational amplifier, and the voltage drop is superposed on a voltage signal output by the first operational amplifier.
Abstract:
An output voltage regulation apparatus includes a voltage regulation circuit, a control circuit, a power stage circuit, a filtering network, and a feedback network. The feedback network is configured to output a feedback voltage to a feedback voltage node of the control circuit. The voltage regulation circuit is configured to regulate the feedback voltage. The control circuit is configured to switch on or off power transistors in the power stage circuit. The filtering network is configured to perform filtering on an output voltage of the power stage circuit to obtain the regulated output voltage.
Abstract:
A direct current-direct current (DC-DC) converter includes an upper transistor, a lower transistor, a first bias circuit and a second bias circuit. A first input end of the first bias circuit is coupled to a first voltage reference, a second input end of the first bias circuit is coupled to a power source (PVDD), and an output end of the first bias circuit is coupled to a gate of the upper transistor to provide a first bias voltage for the gate of the upper transistor. A first input end of the second bias circuit is coupled to a second voltage reference, a second input end of the second bias circuit is coupled to a power ground (PGND), and an output end of the second bias circuit is coupled to a gate of the lower transistor to provide a second bias voltage for the gate of the lower transistor.
Abstract:
A packet diversion method and a DPI device are disclosed in the present invention. The method includes: receiving a packet, where the packet contains a user identifier; according to the user identifier and preset first correspondence between the user identifier and a service type, searching for the service type corresponding to the user identifier in the packet; adding an inner virtual local area network Vlan header to the packet according to the service type, preset second correspondence between a service type and a slave device identifier, and preset third correspondence between a slave device identifier and each bit in a diversion identifier field; and diverting the packet to a corresponding slave device according to the diversion identifier in the diversion identifier field. The inner Vlan header carrying the diversion identifier field is added to the packet, to indicate diversion of the packet in a same cluster.
Abstract:
A packet diversion method and a DPI device are disclosed in the present invention. The method includes: receiving a packet, where the packet contains a user identifier; according to the user identifier and preset first correspondence between the user identifier and a service type, searching for the service type corresponding to the user identifier in the packet; adding an inner virtual local area network Vlan header to the packet according to the service type, preset second correspondence between a service type and a slave device identifier, and preset third correspondence between a slave device identifier and each bit in a diversion identifier field; and diverting the packet to a corresponding slave device according to the diversion identifier in the diversion identifier field. The inner Vlan header carrying the diversion identifier field is added to the packet, to indicate diversion of the packet in a same cluster.
Abstract:
A method and apparatus for determining stripe consistency, including an operation node that obtains n groups of CRC data blocks corresponding to a target stripe, where the target stripe includes n first data blocks, the n first data blocks include k original data blocks and m EC data blocks of the k original data blocks, the n groups of CRC data blocks are respective CRC data blocks of n groups of second data blocks, one group of second data blocks includes m transformation results obtained by performing m times of EC transformation on one first data block, both k and m are positive integers, and n=m+k.
Abstract:
Embodiments of the present disclosure provide example congestion control methods, base stations, and user equipment. After determining that congestion control needs to be performed, a base station determines a congestion control policy, and determines, from UE in coverage of the base station, first UE that needs to perform adjustment according to the congestion control policy. The base station can then send the congestion control policy to the first UE, so that the first UE performs adjustment, to alleviate a congestion status of a PC5 interface. In this process, the base station performs centralized control on all UE in the coverage of the base station.
Abstract:
A superposition operation circuit and a float-voltage digital-to-analog conversion circuit to superpose analog elements according to an indirect current superposition principle, where a voltage follower is implemented using a first operational amplifier such that an output end of the voltage follower is clamped to a voltage that is input to a positive-phase input end, namely, a to-be-superposed analog element. Then a current generation circuit converts a voltage signal to a current signal, a voltage drop for the current signal is generated on a first resistor coupled to an output end of the first operational amplifier, and the voltage drop is superposed on a voltage signal output by the first operational amplifier.
Abstract:
A direct current-direct current (DC-DC) converter includes an upper transistor, a lower transistor, a first bias circuit and a second bias circuit. A first input end of the first bias circuit is coupled to a first voltage reference, a second input end of the first bias circuit is coupled to a power source (PVDD), and an output end of the first bias circuit is coupled to a gate of the upper transistor to provide a first bias voltage for the gate of the upper transistor. A first input end of the second bias circuit is coupled to a second voltage reference, a second input end of the second bias circuit is coupled to a power ground (PGND), and an output end of the second bias circuit is coupled to a gate of the lower transistor to provide a second bias voltage for the gate of the lower transistor.