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    RECEIVING APPARATUS AND INTERFERENCE POWER ESTIMATION METHOD
    31.
    发明申请
    RECEIVING APPARATUS AND INTERFERENCE POWER ESTIMATION METHOD 审中-公开
    接收装置和干扰功率估计方法

    公开(公告)号：US20120178393A1

    公开(公告)日：2012-07-12

    申请号：US13391697

    申请日：2010-08-12

    申请人： Hiroyuki Kawai ,  Mototsugu Suzuki ,  Tetsuro Imai ,  Yoshihiro Ishikawa

    发明人： Hiroyuki Kawai ,  Mototsugu Suzuki ,  Tetsuro Imai ,  Yoshihiro Ishikawa

    IPC分类号： H04B17/00

    CPC分类号： H04J11/0023 ,  H04W24/08

    摘要： Provided are a receiving apparatus and an interference power estimation method that can perform interference power estimation with high accuracy even when correlation in a fading variation between reference signals is low and obtain accurate receiving quality. The interference power estimation method according to the present invention receives a plurality of discontinuous reference signals on the time/frequency plane, extracts the reference signals from the received signal, linear-combines channel variation values obtained from reference signals surrounding a reference signal of a specific time/frequency on the time/frequency plane with predetermined weighting and estimates interference power using the linear-combined value resulting from the linear combining.

    摘要翻译： 提供一种接收装置和干扰功率估计方法，即使在参考信号之间的衰落变化中的相关性低并且获得准确的接收质量的情况下，也能够以高精度执行干扰功率估计。 根据本发明的干扰功率估计方法在时间/频率平面上接收多个不连续参考信号，从接收信号中提取参考信号，将包含特定信号的参考信号的参考信号获得的信道变化值进行线性组合 使用预定加权的时间/频率平面上的时间/频率，并且使用由线性组合产生的线性组合值来估计干扰功率。

    SEPARATOR FOR NON-AQUEOUS BATTERIES, NON-AQUEOUS BATTERY USING SAME, AND PRODUCTION METHOD FOR SEPARATOR FOR NON-AQUEOUS BATTERIES
    32.
    发明申请
    SEPARATOR FOR NON-AQUEOUS BATTERIES, NON-AQUEOUS BATTERY USING SAME, AND PRODUCTION METHOD FOR SEPARATOR FOR NON-AQUEOUS BATTERIES 有权
    非水性电池分离器，使用相同电池的非水电池以及非水电池分离器的生产方法

    公开(公告)号：US20120164514A1

    公开(公告)日：2012-06-28

    申请号：US13414030

    申请日：2012-03-07

    申请人： Tomohiro Hayakawa ,  Hideo Hayashi ,  Hideki Kamada ,  Takayoshi Hosoya ,  Hiroyuki Kawai

    发明人： Tomohiro Hayakawa ,  Hideo Hayashi ,  Hideki Kamada ,  Takayoshi Hosoya ,  Hiroyuki Kawai

    IPC分类号： H01M2/16 ,  B05D1/12 ,  B32B38/00 ,  B82Y30/00

    CPC分类号： H01M2/162 ,  H01M2/145 ,  H01M2/1686 ,  H01M10/05 ,  Y02E60/12

    摘要： Provided is a separator for non-aqueous batteries not only having shutdown property but also achieving both higher output and short-circuit resistance. The separator comprising a laminate comprising: a low melting-point polymer fiber layer (A) having a melting point of 100 to 200° C., the low melting-point polymer fiber layer (A) comprising nanofibers having a fiber diameter of 1000 nm or smaller and formed from the low melting-point polymer; and a heat-resistant polymer fiber layer (B) positioned on the low melting-point polymer fiber layer (A) and comprising a high melting-point polymer having a melting point over 200° C. or a heat infusible polymer, the heat-resistant polymer fiber layer (B) comprising a mixture of nanofibers having a fiber diameter of 1000 nm or smaller and non-nanofibers having a fiber diameter over 1000 nm and both formed from heat-resistant polymer.

    摘要翻译： 提供了一种用于非水电池的隔膜，不仅具有关闭性能，而且实现了更高的输出和短路电阻。 所述隔板包括层压体，其包含：熔点为100〜200℃的低熔点聚合物纤维层（A），所述低熔点聚合物纤维层（A）包含纤维直径为1000nm的纳米纤维 或更小并由低熔点聚合物形成; 和位于低熔点聚合物纤维层（A）上的耐热聚合物纤维层（B），并且包含熔点高于200℃的高熔点聚合物或热熔聚合物， 耐热聚合物纤维层（B），其包含纤维直径为1000nm以下的纳米纤维和纤维直径在1000nm以上的两者的纳米纤维的混合物，均由耐热聚合物形成。

    Cable apparatus
    34.
    发明授权
    Cable apparatus 失效
    电缆设备

    公开(公告)号：US07364110B2

    公开(公告)日：2008-04-29

    申请号：US11274292

    申请日：2005-11-16

    申请人： Michihiro Fujii ,  Hiroyuki Kawai

    发明人： Michihiro Fujii ,  Hiroyuki Kawai

    IPC分类号： B65H75/30

    CPC分类号： B65H75/406 ,  B65H2701/3919 ,  H01R13/72 ,  H01R31/065 ,  H02G11/02 ,  H04M1/15

    摘要： In relation to cables, a cable apparatus, which enhances downsizing by housing a cable when not in use and operability at the time of housing and pulling-out operations, is provided. The cable apparatus for use in connecting electronic apparatuses comprises a chassis housing a cable with connector units connected to the electronic apparatuses; a winding mechanism winding and housing the cable within the chassis; and an operation unit applying a turning force to the winding mechanism and allowing the winding mechanism to wind the cable, wherein the operation unit is pulled up from the chassis to allow the winding mechanism to wind the cable when operated and is pulled down toward the chassis when not operated.

    摘要翻译： 关于电缆，提供一种电缆设备，其通过在不使用时容纳电缆而增强了小型化，并且提供了在外壳和拉出操作时的可操作性。 用于连接电子设备的电缆设备包括：机架，其容纳具有连接到电子设备的连接器单元的电缆; 卷绕机构，其将所述电缆卷绕并容纳在所述底盘内; 以及操作单元，其向所述卷绕机构施加转动力，并且允许所述卷绕机构卷绕所述缆线，其中所述操作单元从所述底盘拉起，以允许所述卷绕机构在操作时卷绕所述缆线并且朝向所述底盘 不操作时

    Card-type terminal
    35.
    发明授权
    Card-type terminal 有权
    卡式终端

    公开(公告)号：US07125258B2

    公开(公告)日：2006-10-24

    申请号：US10765187

    申请日：2004-01-28

    申请人： Koji Nakakubo ,  Hiroyuki Kawai ,  Kiyoshi Nakamichi

    发明人： Koji Nakakubo ,  Hiroyuki Kawai ,  Kiyoshi Nakamichi

    IPC分类号： H01R12/00

    CPC分类号： G06K19/07743 ,  G06K19/07741 ,  H01R13/64 ,  H01R33/76

    摘要： The present invention relates to a card-type terminal such as a PC card with a memory card such as a USIM card. It allows a memory card to be secured easily on a tray and inserted easily into a card-type terminal. A card-type terminal includes a tray slidable in and out freely with a memory card mounted, and a guide which helps the tray slide in and houses the inserted tray; in which the memory card is placed on the tray, which is slid into the guide, thereby installing the memory card in the card-type terminal. The tray has a holder which secures, to the tray, the forward-end center section of the memory card mounted along the insertion direction of the tray and an elastic restraining piece which secures, to the tray, the backward-end center section of the memory card mounted along the insertion direction of the tray.

    摘要翻译： 本发明涉及诸如具有诸如USIM卡的存储卡的PC卡的卡型终端。 它允许将存储卡容易地固定在托盘上并且容易地插入到卡型终端中。 卡式终端包括可自由滑动地安装有存储卡的托盘和帮助托盘滑入并容纳插入的托盘的引导件; 其中存储卡被放置在滑入引导件的托盘上，从而将存储卡安装在卡式终端中。 托盘具有保持器，其将沿着托盘的插入方向安装的存储卡的前端中心部分固定到托盘，弹性限制件将托盘固定到托盘的后端中心部分 存储卡沿托盘的插入方向安装。

    Square root extraction circuit and floating-point square root extraction device
    38.
    发明授权
    Square root extraction circuit and floating-point square root extraction device 失效
    平方根提取电路和浮点平方根提取装置

    公开(公告)号：US06820107B1

    公开(公告)日：2004-11-16

    申请号：US09667783

    申请日：2000-09-22

    申请人： Hiroyuki Kawai ,  Robert Streitenberger ,  Yoshitsugu Inoue ,  Hiroyuki Morinaka

    发明人： Hiroyuki Kawai ,  Robert Streitenberger ,  Yoshitsugu Inoue ,  Hiroyuki Morinaka

    IPC分类号： G06F738

    CPC分类号： G06F7/5525 ,  G06F7/483

    摘要： A square root extraction circuit and a floating-point square root extraction device which simplify a circuit structure and improve an operation speed are provided. Portions for generating square root partial data (q3 to q8) include carry output prediction circuits (3 to 8), respectively. The carry output prediction circuit (i) (i equals any one of 3 to 8) receives condition flags (AHin, ALin), the most significant addition result (SUM), and square root partial data (q(i−1)) from the preceding square root partial data generating portion, and also receives a carry input (Cin) to output condition flags (AHout, ALout) for the next square root partial data generating portion, and square root partial data (q(i)). The condition flags (AHout, ALout) serve as the condition flags (AHin, ALin) for the carry output prediction circuit (i+1), respectively.

    摘要翻译： 提供了简化电路结构并提高操作速度的平方根提取电路和浮点平方根提取装置。 用于产生平方根部分数据（q3至q8）的部分分别包括进位输出预测电路（3至8）。 进位输出预测电路（i）（i等于3至8中的任何一个）从第一个输入预测电路（i）中接收条件标志（AHin，ALin），最高有效相加结果（SUM）和平方根部分数据（q（i-1） 前一平方根部分数据生成部分，并且还接收用于下一个平方根部分数据生成部分的输出条件标志（AHout，ALout）的进位输入（Cin）和平方根部分数据（q（i））。 条件标志（AHout，ALout）分别用作进位输出预测电路（i + 1）的条件标志（AHin，ALin）。

    Graphic processor having multiple geometric operation units and method of processing data thereby
    39.
    发明授权
    Graphic processor having multiple geometric operation units and method of processing data thereby 有权
    具有多个几何运算单元的图形处理器和由此处理数据的方法

    公开(公告)号：US06795075B1

    公开(公告)日：2004-09-21

    申请号：US09685895

    申请日：2000-10-11

    申请人： Robert Streitenberger ,  Hiroyuki Kawai ,  Junko Kobara ,  Yoshitsugu Inoue ,  Keijiro Yoshimatsu

    发明人： Robert Streitenberger ,  Hiroyuki Kawai ,  Junko Kobara ,  Yoshitsugu Inoue ,  Keijiro Yoshimatsu

    IPC分类号： G06F1516

    CPC分类号： G06T15/005

    摘要： A graphic processor includes first and second buses and a plurality of geometric operation units having an output connected to the second bus, and a circuit to allocate a plurality of ordered data blocks formed of data to be operated upon to the plurality of geometric operation units, and an input of at least one of the plurality of geometric operation units is connected to the first bus. The plurality of geometric operation units include all arbitrating circuit to arbitrate the order of output between an output buffer to store a result of processing by the allocated data blocks and another geometric operation unit, and output data resulting from processing onto the second bus in an order corresponding to the sequence of the plurality of data blocks of data to be operated upon.

    摘要翻译： 图形处理器包括第一和第二总线以及具有连接到第二总线的输出的多个几何运算单元，以及分配由多个几何运算单元运行的数据构成的多个有序数据块的电路， 并且所述多个几何运算单元中的至少一个的输入连接到所述第一总线。 多个几何运算单元包括用于仲裁输出缓冲器之间的输出顺序的所有仲裁电路，用于存储由分配的数据块和另一几何运算单元进行的处理结果，并且以按顺序将从处理得到的处理结果输出到第二总线上 对应于要被操作的数据的多个数据块的序列。

    First-in first-out data transfer control device having a plurality of banks
    40.
    发明授权
    First-in first-out data transfer control device having a plurality of banks 有权
    具有多个存储体的先进先出的数据传送控制装置

    公开(公告)号：US06697889B2

    公开(公告)日：2004-02-24

    申请号：US09778778

    申请日：2001-02-08

    申请人： Junko Kobara ,  Hiroyuki Kawai ,  Yoshitsugu Inoue ,  Robert Streitenberger

    发明人： Junko Kobara ,  Hiroyuki Kawai ,  Yoshitsugu Inoue ,  Robert Streitenberger

    IPC分类号： G06F1336

    CPC分类号： G06F5/065

    摘要： An FIFO data transfer control device includes an instruction analyzing portion for analyzing an instruction for data transfer to an FIFO storage device including a plurality of banks, and calculating an amount of data to be transferred; a data count portion for calculating, from the data amount calculated by the instruction analyzing portion, an amount of the data written in the bank being in an outputting state, and issuing a determination flag indicating whether the free space of the bank being in the outputting state satisfies predetermined conditions or not; and a full check portion for inhibiting processing of a next instruction until the determination flag sent from the data count portion or the full flag issued from the FIFO storage device is reset.

    摘要翻译： FIFO数据传送控制装置包括指令分析部分，用于分析用于数据传送到包括多个存储体的FIFO存储装置的数据传输指令，并计算要传送的数据量; 数据计数部分，用于根据由指令分析部分计算的数据量计算写入处于输出状态的存储体中的数据量，并且发出指示所述存储体的存储空间是否在输出中的确定标志 状态满足预定条件; 以及用于禁止下一个指令的处理的完整检查部分，直到从数据计数部分发送的确定标志或从FIFO存储装置发出的完整标志被重置。