Abstract:
An exemplary liquid crystal panel (20) includes a first substrate (22), a second substrate (24) facing toward the first substrate (22), a liquid crystal layer (23) sandwiched between the two substrates, and a plurality of the conductive adhesive blocks (225) in the non-displaying region. The first substrate includes a non-displaying region (222). A transparent conductive layer (226) is disposed at a surface of the first substrate and capable of transmitting a common voltage signal to the liquid crystal layer. The first substrate at the non-displaying region includes protrusions (253) defining a plurality of gaps (254) therebetween. The transparent conductive layer covers the protrusions including parts of the protrusions defining the gaps. The conductive adhesive blocks contact the transparent conductive layer at the non-displaying region.
Abstract:
An exemplary TFT array substrate (20) includes: an insulating substrate (201); a common electrode (220), a common line (224), a gate line (23), and a gate electrode (281) arranged on the insulating substrate; a gate insulating layer (204) covering the common electrode, the common line, the gate line, and the gate electrode; a semiconductor layer (207) arranged on the gate insulating layer; a source and a drain electrodes (281, 282) arranged on two ends the semiconductor layer; a passivation material layer (25) covering the gate insulating layer; a pixel electrode arranged on the passivation material layer, the pixel electrode (290) being electrically connected to the drain electrode via a through hole (284); and at least one through channel (225) arranged crossing the gate insulating layer. The at least one through channel are arranged between the common electrode and the gate line, and between the gate line and the common line.
Abstract:
A mask which can mitigate the so-called stitching effect. The mask includes a plurality of blocks. The stitching area between two adjacent blocks is nonlinear. In an exposure process of the glass substrate for liquid crystal display, the mask can alleviate the substrate from stitching effect while exposing the glass substrate, so as to decrease beeline effect of the stitching area. An exposing method using the mask is also provided.
Abstract:
An exemplary ESD protection circuit includes first and second sets of transistors and an ESD discharge transistor. Each of the transistors includes a source electrode, a drain electrode, and a gate electrode. The drain electrodes and gate electrodes of each of the transistors are connected to each other, and the source electrodes of the transistors are respectively connected to the drain electrodes of the next adjacent transistors in both sets of the transistors. The gate electrode of the ESD transistor, the source electrodes of last transistors of the first and second sets of the transistors are connected to each other, the source electrode of the ESD transistor is connected to the drain electrode of a first transistor of the first set of the transistors, and the drain electrode of the ESD transistor is connected to the drain electrode of a first transistor of the second set of the transistors.
Abstract:
An exemplary liquid crystal display device includes a liquid crystal panel configured for displaying images according to external image data. The liquid crystal panel comprising a plurality of sub-pixel regions and a controlling circuit. The sub-pixel regions are arranged regularly, each of the sub-pixel regions having either a positive polarity or a negative polarity when displaying images. The controlling circuit is configured to adjust a common voltage applied to the liquid crystal panel according to a relationship between variations of the common voltage and polarity information of at least a plurality of the sub-pixel regions during operation of the liquid crystal display device.
Abstract:
A liquid crystal display includes an insulating substrate, a plurality of parallel gate lines disposed on the insulating substrate, and a plurality of data lines disposed on the insulating substrate. The data lines insulatingly intercross the gate lines. An intersection between two of the plurality of gate lines and a corresponding two of the plurality of data lines defines a pixel region. Each pixel region includes a first thin film transistor (TFT), a first pixel electrode, and a second pixel electrode. The first TFT includes a first gate electrode connected with the gate line, a first source electrode connected with the first pixel electrode, and a first drain electrode connected with the first pixel electrode. A voltage of the first pixel electrode is different from a voltage of the second pixel electrode.
Abstract:
An exemplary liquid crystal panel (20) includes a first substrate (22), a second substrate (24) facing toward the first substrate (22), a liquid crystal layer (23) sandwiched between the two substrates, and a plurality of the conductive adhesive blocks (225) in the non-displaying region. The first substrate includes a non-displaying region (222). A transparent conductive layer (226) is disposed at a surface of the first substrate and capable of transmitting a common voltage signal to the liquid crystal layer. The first substrate at the non-displaying region includes protrusions (253) defining a plurality of gaps (254) therebetween. The transparent conductive layer covers the protrusions including parts of the protrusions defining the gaps. The conductive adhesive blocks contact the transparent conductive layer at the non-displaying region.
Abstract:
An LCD includes data lines, gate lines intersecting with the data lines, and pixel units. Each pixel unit is defined by a minimal area formed by two adjacent data lines and two adjacent gate lines. Each pixel unit includes a first sub pixel unit and a second sub pixel unit. The first sub pixel unit includes a first thin film transistor (TFT) and a first pixel electrode. The second sub pixel unit includes a second TFT and a second pixel electrode. A gate electrode of the first TFT is connected to the gate line, a source electrode of the first TFT is connected to the data line. A source electrode of the second TFT is connected to a same data line, and a gate electrode of the second TFT is electrically floating.