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公开(公告)号：US20240007158A1
公开(公告)日：2024-01-04
申请号：US18346181
申请日：2023-06-30
Applicant: Innophase, Inc. , Parallel Wireless, Inc.
Inventor： Jongheon Kim , Yang Xu , Yaniv Kavir
IPC: H04B7/06 , H04B7/0426
CPC classification number: H04B7/0617 , H04B7/043
Abstract: Multi-level beamforming signal processing of frequency-domain inphase and quadrature data packets by a group of serially-connected transceivers. Packets intended for transmission during some frames are formatted according to subarray-level beamforming, while packets for transmission in other frames are formatted according to a full-dimensional level of beamforming.
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公开(公告)号：US20230116561A1
公开(公告)日：2023-04-13
申请号：US18065542
申请日：2022-12-13
Applicant: Innophase, Inc. , Parallel Wireless, Inc.
Inventor： Yang Xu , Steven Paul Papa
IPC: H04B7/06 , H04B7/0417 , H04B7/08
Abstract: Methods disclosed herein may include configuring a plurality of transceiver modules in an antenna array with assigned receive signal weighting factors, the transceiver modules interconnected with high-speed data communication buses, and each transceiver module positioned adjacent to a respective antenna element in the antenna array; configuring the plurality of transceiver modules into inter-communicating module groups by enabling the associated high-speed data communication buses; receiving a plurality of wireless data signals with the plurality of transceiver modules and responsively generating a corresponding plurality of receive baseband data signals; generating a plurality of received beamformed signals by combining subsets of the receive baseband signals within each module group using the assigned receive signal weighting factors by transmitting the receive baseband signals between the transceiver modules within the module group; and demodulating the received beamformed signals.
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公开(公告)号：US20220013921A1
公开(公告)日：2022-01-13
申请号：US17290681
申请日：2019-11-01
Applicant: Innophase, Inc.
Inventor： Yang Xu , Jeffrey Shamblin
Abstract: A configurable array having a plurality of antenna elements arranged in at least four adjacent groups of array elements on a panel array, the first group of elements having an inter-element spacing based on a transmit signal wavelength, a second group of elements having an inter-element spacing based on a receive signal wavelength, and a third and fourth group of elements having an inter-element spacing based on a wavelength between the transmit signal wavelength and the receive signal wavelength.
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公开(公告)号：US10728851B1
公开(公告)日：2020-07-28
申请号：US16241988
申请日：2019-01-07
Applicant: Innophase, Inc.
Inventor： Per Konradsson , Yang Xu
Abstract: Selectively enabling an amplitude processing circuit and a phase processing circuit of a wireless station's polar receiver with respect to reception of a beacon signal. Such systems and methods may include sequentially demodulating symbols of the received beacon signal using at least the phase processing circuit to detect a traffic indication signal value in a data payload portion of the received beacon signal. Upon detecting a condition indicating no data traffic for the wireless station, the phase processing circuit may be turned off. The polar receiver may demodulate symbols of the received beacon signal and upon detecting a beacon preamble symbol sequence, shut off the amplitude processing circuit and set the amplitude to a fixed value. The phase processing circuit in conjunction with the fixed amplitude value may be used to demodulate symbols of the beacon signal.
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公开(公告)号：US10158509B2
公开(公告)日：2018-12-18
申请号：US14863174
申请日：2015-09-23
Applicant: Innophase Inc.
Inventor： Yang Xu , Sara Munoz Hermoso
IPC: H03D3/18 , H03D3/24 , H04L27/227 , H04L27/34
Abstract: Systems and methods are provided for aligning amplitude and phase signals in a polar receiver. A receiver generates digital amplitude and phase signals representing the amplitude and phase of a modulated input signal. At least one of the digital signals is filtered using a fractional delay filter with a variable delay. The delay of the fractional delay filter is adjusted to align the amplitude and phase signals. In some embodiments, an error vector magnitude is determined by comparing in-phase and quadrature values of the signal with values corresponding to a constellation point, and the delay is adjusted based on the error vector magnitude. The fractional delay filter may be a finite impulse response filter with coefficients stored in a lookup table that correspond to different delays.
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Patent Agency Ranking
公开(公告)号：US10148230B2
公开(公告)日：2018-12-04
申请号：US15654507
申请日：2017-07-19
Applicant: Innophase, Inc.
Inventor： Yang Xu , Sara Munoz Hermoso
Abstract: A predistortion circuit receives an input polar signal to be transmitted, including an input amplitude signal and an input phase signal. The input polar signal is predistorted using at least one predistortion parameter selected from a lookup table. A phase-and-amplitude modulated radio-frequency signal is generated corresponding to the predistorted polar signal. A copy of the generated radio-frequency signal is provided to a polar receiver. The polar receiver is operated to generate, from the copy of the radio-frequency signal and without information relating to the generated transmit signal, a feedback polar signal including a feedback amplitude signal and a feedback phase signal. The feedback polar signal is compared to the input polar signal, the lookup table is updated in response to the comparison.
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公开(公告)号：US20170194975A1
公开(公告)日：2017-07-06
申请号：US15469073
申请日：2017-03-24
Applicant: Innophase, Inc.
Inventor： Yang Xu , Fa Dai , Dongyi Liao
IPC: H03L7/099
CPC classification number: H03L7/0992 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03C3/0925 , H03C3/0941 , H03C3/095
Abstract: A digitally controlled oscillator (DCO) modulation apparatus and method provides a wideband phase-modulated signal output. An exemplary modulator circuit uses an oscillator in a phase-locked loop. The circuit receives a wrapped-phase input signal, unwraps the wrapped-phase input signal to generate an unwrapped-phase signal, and differentiates the unwrapped-phase signal. The wrapped-phase input signal and the differentiated unwrapped-phase signal are both injected into a feedback loop of the modulator circuit. The feedback loop may include a multi-modulus frequency divider with a frequency divisor that is temporarily incremented or decremented to cancel out abrupt phase jumps associated with the wrapped-phase to unwrapped-phase conversion.
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公开(公告)号：US09673829B1
公开(公告)日：2017-06-06
申请号：US14957134
申请日：2015-12-02
Applicant: Innophase Inc.
Inventor： Yang Xu , Sara Munoz Hermoso , Roc Berenguer Perez
CPC classification number: H03L7/24 , H03D3/007 , H03D2200/006 , H04L27/389
Abstract: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.
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公开(公告)号：US09673828B1
公开(公告)日：2017-06-06
申请号：US14957131
申请日：2015-12-02
Applicant: Innophase Inc.
Inventor： Yang Xu , Sara Munoz Hermoso , Roc Berenguer Perez
Abstract: Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.
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公开(公告)号：US20170085405A1
公开(公告)日：2017-03-23
申请号：US14863174
申请日：2015-09-23
Applicant: Innophase Inc.
Inventor： Yang Xu , Sara Munoz Hermoso
IPC: H04L27/227 , H04L27/34
CPC classification number: H04L27/2272 , H04L27/3444 , H04L2201/02
Abstract: Systems and methods are provided for aligning amplitude and phase signals in a polar receiver. A receiver generates digital amplitude and phase signals representing the amplitude and phase of a modulated input signal. At least one of the digital signals is filtered using a fractional delay filter with a variable delay. The delay of the fractional delay filter is adjusted to align the amplitude and phase signals. In some embodiments, an error vector magnitude is determined by comparing in-phase and quadrature values of the signal with values corresponding to a constellation point, and the delay is adjusted based on the error vector magnitude. The fractional delay filter may be a finite impulse response filter with coefficients stored in a lookup table that correspond to different delays.
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