公开(公告)号：US20170085405A1

公开(公告)日：2017-03-23

申请号：US14863174

申请日：2015-09-23

Applicant: Innophase Inc.

Inventor： Yang Xu ,  Sara Munoz Hermoso

IPC: H04L27/227 ,  H04L27/34

CPC classification number: H04L27/2272 ,  H04L27/3444 ,  H04L2201/02

Abstract: Systems and methods are provided for aligning amplitude and phase signals in a polar receiver. A receiver generates digital amplitude and phase signals representing the amplitude and phase of a modulated input signal. At least one of the digital signals is filtered using a fractional delay filter with a variable delay. The delay of the fractional delay filter is adjusted to align the amplitude and phase signals. In some embodiments, an error vector magnitude is determined by comparing in-phase and quadrature values of the signal with values corresponding to a constellation point, and the delay is adjusted based on the error vector magnitude. The fractional delay filter may be a finite impulse response filter with coefficients stored in a lookup table that correspond to different delays.

公开(公告)号：US20180316524A1

公开(公告)日：2018-11-01

申请号：US15583644

申请日：2017-05-01

Applicant: INTEL CORPORATION

Inventor： Mor M. COHEN ,  Yaniv HADAR ,  Ehud U. SHOOR

IPC: H04L25/03 ,  H04L7/033

CPC classification number: H04L25/03949 ,  H04L7/00 ,  H04L7/033 ,  H04L25/03057 ,  H04L2201/02 ,  H04L2201/04

Abstract: An apparatus is provided which comprises: a data slicer to receive first data sampled by a data clock; an edge slicer to receive second data sampled by an edge clock; and a Least Mean Square (LMS) circuitry coupled to the data and edge slicers, wherein the LSM circuitry is to generate a code to adjust a phase of one of data clock and/or edge clock relative to one another.

公开(公告)号：US20170170991A1

公开(公告)日：2017-06-15

申请号：US15350212

申请日：2016-11-14

Applicant: Intel IP Corporation

Inventor： Tobias Scholand ,  Edgar Bolinth ,  Robert Kokke ,  Umer Salim ,  Thomas Esch

IPC: H04L25/03 ,  H04W56/00 ,  H04B17/318

CPC classification number: H04L25/03 ,  H04B7/024 ,  H04B17/318 ,  H04L25/03821 ,  H04L25/067 ,  H04L2201/02 ,  H04L2201/04 ,  H04W56/003

Abstract: A communication terminal is described comprising a radio frequency receiver configured to receive a signal comprising signal components transmitted via different communication channels, each modulated based on a common modulation symbol shared by the plurality of communication channels, an equalizer for each communication channel configured to equalize the signal received based on respective one or more channel parameters, a demodulator for each communication channel configured to calculate probability information information bits to be equal to a particular binary value, a combiner configured to combine the probability information calculated for the plurality of communication channels and a decoder configured to generate reconstructed useful data based on the combined probability information.