Abstract:
In an embodiment, a processor includes execution logic to execute binary translated (BT) code that is translated from native architecture (NA) code. The processor also includes processor trace (PT) logic to output trace information responsive to execution of a BT direct branch instruction in the BT code when the NA code includes an NA direct branch instruction that corresponds to the BT direct branch instruction. The trace information is to include an indication of an NA outcome associated with an execution of the NA direct branch instruction. The trace information is to be based on a BT outcome associated with the execution of the BT direct branch instruction. Other embodiments are described and claimed.
Abstract:
A data processing system (DPS) supports control-flow integrity (CFI). The DPS comprises a processing element with a CFI enforcement mechanism that supports one or more CFI instructions. The DPS also comprises at least one machine-accessible medium responsive to the processing element. Managed code in the machine-accessible medium is configured (a) to execute in a managed runtime environment (MRE) in the data processing system, and (b) to transfer control out from the MRE to unmanaged code, in response to a transfer control statement in the managed code. The machine-accessible medium also comprises a binary translator which, when executed, converts unmanaged code in the data processing system into hardened unmanaged code (HUC) by including CFI features in the HUC. The CFI features comprise one or more CFI instructions to utilize the CFI enforcement mechanism of the processing element for transfers of control initiated by the HUC. Other embodiments are described and claimed.
Abstract:
Method and apparatus to efficiently detect violations of data dependency relationships. A memory address associated with a computer instruction may be obtained. A current state of the memory address may be identified. The current state may include whether the memory address is associated with a read or a store instruction, and whether the memory address is associated with a set or a check. A previously accumulated state associated with the memory address may be retrieved from a data structure. The previously accumulated state may include whether the memory address was previously associated with a read or a store instruction, and whether the memory address was previously associated with a set or a check. If a transition from the previously accumulated state to the current state is invalid, a failure condition may be signaled.