公开(公告)号：US11155739B2

公开(公告)日：2021-10-26

申请号：US15824158

申请日：2017-11-28

Applicant: Infineon Technologies AG

Inventor： Alexander Roth

IPC: C09K5/14 ,  C04B41/48 ,  C04B41/00 ,  C04B41/49 ,  H01L23/373 ,  C04B41/83 ,  C04B41/84 ,  C08J5/24 ,  B29C71/02 ,  C08K3/38 ,  C04B111/00

Abstract: A resin-impregnated boron nitride body includes a polymer-derived boron nitride and a resin. A process for manufacturing such a resin-impregnated boron nitride body includes: polymerizing a boron nitride molecular precursor into a preceramic polymer shaping the preceramic polymer to form an infusible polymer body; submitting the polymer body to a thermal treatment to obtain a boron nitride body; impregnating the boron nitride body with a resin; and curing the resin.

公开(公告)号：US11081414B2

公开(公告)日：2021-08-03

申请号：US16260834

申请日：2019-01-29

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Olaf Hohlfeld

IPC: H01L23/24 ,  H01L23/053 ,  H01L21/56 ,  H01L23/29 ,  H01L21/54 ,  H01L23/00

Abstract: A power semiconductor module arrangement includes a substrate arranged in a housing. The substrate includes a first metallization layer arranged on a first side of a dielectric insulation layer and a second metallization layer arranged on a second side of the dielectric insulation layer. At least one semiconductor body is mounted on a first surface of the first metallization layer facing away from the dielectric insulation layer. A connecting element is arranged on and electrically connected to the first surface. A contact element is inserted into and electrically connected to the connecting element, and extends from the connecting element through an interior of the housing and through an opening in the cover of the housing to an outside of the housing in a direction perpendicular to the first surface. A hard encapsulation is arranged adjacent to the first metallization layer and at least partly fills the inside of the housing.

公开(公告)号：US20180301444A1

公开(公告)日：2018-10-18

申请号：US15952282

申请日：2018-04-13

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Juergen Hoegerl ,  Hans-Joachim Schulze ,  Hans-Joerg Timme

IPC: H01L25/00 ,  H01L23/14 ,  H01L23/373 ,  H01L21/48 ,  H01L25/16 ,  H01L25/18 ,  H01L23/495 ,  H01L21/56 ,  H01L23/31

Abstract: A module is disclosed. In one example, the module includes a carrier, an at least partially thermally conductive and electrically insulating body mounted on only a part of a main surface of the carrier, an at least partially electrically conductive redistribution structure on the thermally conductive and electrically insulating body, an electronic chip mounted on the redistribution structure and above the thermally conductive and electrically insulating body, and an encapsulant encapsulating at least part of the carrier, at least part of the thermally conductive and electrically insulating body, at least part of the redistribution structure, and at least part of the electronic chip.

公开(公告)号：US20170257945A1

公开(公告)日：2017-09-07

申请号：US15450813

申请日：2017-03-06

Applicant: Infineon Technologies AG

Inventor： Alexander Roth

IPC: H05K1/03 ,  H05K3/46 ,  H05K3/06 ,  H05K1/02

CPC classification number: H05K1/0306 ,  H01L23/12 ,  H01L23/544 ,  H01L2223/54413 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54486 ,  H05K1/0269 ,  H05K1/0284 ,  H05K3/06 ,  H05K3/4644 ,  H05K2201/09145 ,  H05K2201/0929 ,  H05K2201/09936 ,  H05K2203/107

Abstract: A substrate includes a ceramic layer, a metal layer fixed in a planar manner on a surface side of the ceramic layer and a cutout arranged in an edge region of the metal layer. The cutout in the edge region codes information. A multiple substrate having a plurality of these substrates is also provided, as is a method for producing the substrate.