公开(公告)号：US20140285757A1

公开(公告)日：2014-09-25

申请号：US14208578

申请日：2014-03-13

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki ,  Masashi Mitsui

IPC: G02F1/1335

CPC classification number: G02F1/133553 ,  G02F1/133555 ,  G02F1/133707 ,  G02F1/1362 ,  G02F2001/133638

Abstract: According an aspect, a liquid crystal display device includes: a first substrate on which a reflective electrode is arranged for each of a plurality of pixels; a second substrate; a liquid crystal layer arranged between the first substrate and the second substrate; and a wave plate in which liquid crystals are fixed so that an alignment direction of the liquid crystals is opposite to an alignment direction of the liquid crystal layer. The wave plate is arranged on a second substrate side of the liquid crystal layer.

Abstract translation: 根据本发明，液晶显示装置包括：第一基板，其对多个像素中的每一个布置有反射电极; 第二基板; 布置在所述第一基板和所述第二基板之间的液晶层; 以及固定液晶以使液晶的取向方向与液晶层的取向方向相反的波片。 波片配置在液晶层的第二基板侧。

公开(公告)号：US20140022499A1

公开(公告)日：2014-01-23

申请号：US13943203

申请日：2013-07-16

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki ,  Kazuyuki Maeda

IPC: G02F1/1343

CPC classification number: G02F1/13439 ,  G02F1/133504 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/133528 ,  G02F1/133555 ,  G02F1/13363 ,  G02F1/134336 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133357 ,  G02F2001/133638 ,  G02F2001/134345 ,  G02F2201/123 ,  G02F2413/02 ,  G02F2413/04 ,  G02F2413/06 ,  G09G2300/0456

Abstract: According to an aspect, a semi-transmissive liquid crystal display device includes a plurality of pixels arranged in a matrix, a plurality of reflective electrodes, a counter electrode facing the reflective electrode, and a liquid crystal layer. The reflective electrodes are provided for each of the pixels, and each of them includes a plurality of electrodes, with a combination of the areas of which area coverage modulation is performed by using n bits. The electrodes are configured such that a ratio of the sum of the perimeter(s) of electrode(s) corresponding to each bit of the n bits satisfies 1:2: . . . :2n-1. The liquid crystal layer is provided between the reflective electrode and the counter electrode. The semi-transmissive liquid crystal display device is configured to carry out reflective display using the reflective electrode and carry out transmissive display using at least a space of the reflective electrode between the pixels.

Abstract translation: 根据本发明，半透射型液晶显示装置具有排列成矩阵状的多个像素，多个反射电极，与该反射电极对置的对置电极以及液晶层。 为每个像素提供反射电极，并且它们中的每一个包括多个电极，其中通过使用n位来执行区域覆盖调制的区域的组合。 这些电极被配置为使得对应于n位的每个位的电极的周边的总和的比率满足1：2：。 。 。 ：2n-1。 液晶层设置在反射电极和对电极之间。 半透射型液晶显示装置被配置为使用反射电极进行反射显示，并且使用像素之间的反射电极的至少一个空间进行透射显示。

公开(公告)号：US11409167B2

公开(公告)日：2022-08-09

申请号：US17314380

申请日：2021-05-07

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki

IPC: G02F1/1339 ,  G02F1/1335 ,  G02F1/1343

Abstract: According to one embodiment, a liquid crystal display comprising a first substrate, a second substrate opposed the first substrate, a liquid crystal layer between the first substrate and the second substrate, a light-shielding layer including a first light-shield formed along a first direction and a second light-shield formed along a second direction and crossing the first light-shield, and a spacer which maintains a gap between the first substrate and the second substrate, the spacer overlapping a crossing region where the first light-shield and the second light-shield cross each other and including an exposed region outside the light-shielding layer in a planar view.

公开(公告)号：US11294247B2

公开(公告)日：2022-04-05

申请号：US17082090

申请日：2020-10-28

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki

IPC: G02F1/1345 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G06F3/14 ,  G09G3/36

Abstract: According to one embodiment, a display device includes a driver, a pixel circuit disposed to be apart from the driver in a plan view and to be electrically connected to the driver, a first pixel electrode disposed to overlap the pixel circuit in a plan view and to be electrically connected to the pixel circuit, a second pixel electrode disposed to overlap the driver in a plan view and to be closer to an outer edge of a display area than the first pixel electrode, and a relay line disposed between the pixel circuit and the first pixel electrode and between the driver and the second pixel electrode, the relay line electrically connecting the first pixel electrode and the second pixel electrode.

公开(公告)号：US11183132B2

公开(公告)日：2021-11-23

申请号：US17014628

申请日：2020-09-08

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki ,  Tsutomu Harada ,  Hirotaka Hayashi

IPC: G09G3/36

Abstract: According to one embodiment, a display device, includes a first pixel line including a first sub-pixel and a second sub-pixel, a second pixel line including a third sub-pixel and a fourth sub-pixel, and a display driver supplying video signals which cause signal polarities of signal lines adjacent to each other to be opposite to each other, without varying the polarities in one frame period, the video signals having the same polarities as each other being written to the respective sub-pixels of the first pixel line, the video signals having the polarities which are the same as each other and opposite to the polarities of the video signals written to the first pixel line, being written to the respective sub-pixels of the second pixel line.

公开(公告)号：US10997933B2

公开(公告)日：2021-05-04

申请号：US16744638

申请日：2020-01-16

Applicant: Japan Display Inc.

Inventor： Yutaka Mitsuzawa ,  Takayuki Nakao ,  Yutaka Ozawa ,  Masaya Tamaki

IPC: G09G3/36 ,  H04N5/3745 ,  G09G5/39 ,  G11C11/16 ,  G11C11/14

Abstract: A display device is provided and includes sub-pixels each including a sub-pixel electrode, and a first and second memory; a clock signal output circuit configured to, based on a reference clock signal, output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a memory selection circuit configured to select all of the first memories included in all the sub-pixels or all of the second memories included in all the sub-pixels in synchronization with the selected clock signal; a common electrode facing all of the sub-pixel electrodes; and a common-electrode driving circuit configured to provide a common potential to the common electrode, wherein the common potential is inverted in synchronization with the reference clock signal, wherein the sub-pixel electrode is driven based on sub-pixel data stored in the selected one of the memories to display an image.

公开(公告)号：US10578932B2

公开(公告)日：2020-03-03

申请号：US15359650

申请日：2016-11-23

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki ,  Toshiharu Matsushima

IPC: G02F1/1343 ,  G02F1/1337 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/1362

Abstract: According to an aspect, a liquid crystal display device includes: a first substrate and a second substrate that face each other; a liquid crystal layer provided between the first substrate and the second substrate; and a first electrode and a second electrode provided between the first substrate and the liquid crystal layer. The first electrode includes: at least an electrode base portion that extends in a first direction; and a plurality of comb-shaped portions that protrude from the electrode base portion at a fixed distance away from each other, and extend in a second direction different from the first direction. Each comb-shaped portion has a coupling portion layered on or under the electrode base portion.

公开(公告)号：US10553167B2

公开(公告)日：2020-02-04

申请号：US16020055

申请日：2018-06-27

Applicant: Japan Display Inc.

Inventor： Yutaka Mitsuzawa ,  Takayuki Nakao ,  Yutaka Ozawa ,  Masaya Tamaki

IPC: G09G3/36 ,  G09G5/39 ,  H04N5/3745 ,  G11C11/16 ,  G11C11/14

Abstract: A display device includes: a plurality of sub-pixels each including a memory block; a clock signal output circuit configured to output a plurality of clock signals having different frequencies; a selection circuit configured to select one of the clock signals as a selected clock signal; a plurality of memory selection line groups provided for respective rows; a memory selection circuit configured to output a memory selection signal concurrently to the memory selection line groups in synchronization with the selected clock signal, the memory selection signal being a signal for selecting one from a plurality of memories in each of the memory blocks; a common electrode to which a common potential common to the sub-pixels is supplied; and a common-electrode driving circuit configured to switch the common potential in synchronization with the reference clock signal and output the switched common potential.

公开(公告)号：US10527893B2

公开(公告)日：2020-01-07

申请号：US15920277

申请日：2018-03-13

Applicant: Japan Display Inc.

Inventor： Koichi Nagasawa ,  Masaya Tamaki ,  Shuji Hayashi ,  Masaaki Kabe ,  Yoko Fukunaga

IPC: G02F1/1343 ,  H01L27/12 ,  G02F1/133 ,  G02F1/1337 ,  G02F1/1345

Abstract: A pixel array substrate structure includes: first and second planarizing films sequentially stacked on a substrate where a circuit unit is formed; and a relay wire formed between the first and second planarizing films, in which the relay wire electrically connects a first contact portion formed on the first planarizing film and connected to the circuit unit with a second contact portion formed at a position different from the first contact portion when seen from above, on the second planarizing film.

公开(公告)号：US20200004071A1

公开(公告)日：2020-01-02

申请号：US16569213

申请日：2019-09-12

Applicant: Japan Display Inc.

Inventor： Masaya Tamaki ,  Akihiko Saitoh

IPC: G02F1/133 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1345

Abstract: According to one embodiment, a display device includes a driver, a first pixel circuit disposed apart from the driver in plan view but electrically connected to the driver, a second pixel circuit separated further from the driver than the first pixel circuit in plan view but electrically connected to the driver, a first pixel electrode overlapping the driver in plan view, a second pixel electrode overlapping the first pixel circuit in plan view, a first relay line electrically connecting the first pixel circuit and the first pixel electrode to each other, and a second relay line electrically connecting the second pixel circuit and the second pixel electrode to each other.