摘要:
A display device includes multiple first data lines, multiple second data lines, multiple pixel columns, at least a first charge sharing switch circuit and at least a second charge sharing switch circuit. The second data lines are alternately arranged with the first data lines. Each of the pixel columns includes multiple first pixels and multiple second pixels. The first pixels of each of the pixel columns are coupled to one of the first data lines, and the second pixels of each of the pixel columns are coupled to one of the second data lines. The first charge sharing switch circuit each is electrically coupled to at least a part of the first data lines. The second charge sharing switch circuit each is electrically coupled to at least a part of the second data lines. A display device driving method and a source driving circuit also are provided.
摘要:
A pixel array, a driving method thereof and a flat panel display using the same are provided. The pixel array includes a first, a second, a third, and a fourth scan lines. A plurality of pixels is disposed between the first and the second scan lines. A plurality of pixels is disposed between the third and the fourth scan lines. In a first frame period, a gate driving circuit sequentially provides a driving signal to the first, the second, the fourth and the third scan lines. In a second frame period, the gate driving circuit sequentially provides the driving signal to the second, the first, the third and the fourth scan lines.
摘要:
A method for driving a liquid crystal display adjusts the falling edges of the gate driving signals for reducing image flicker. A first gate driving signal falls from a high level to a first level at the signal falling edge. A second gate driving signal falls from the high level to a second level at the signal falling edge. When the parasitic capacitance of a first pixel is larger than that of a second pixel, the first level is lower than the second level; when the parasitic capacitance of the first pixel is substantially the same as that of the second pixel, the first level is the same as the second level; when the parasitic capacitance of the first pixel is smaller than that of the second pixel, the first level is higher than the second level.
摘要:
The present invention in one aspect relates to a source driver for driving a display panel to display an image data in an adaptive column inversion. In one embodiment, the source driver includes a data processing unit having a logic circuit adapted for determining N most-significant bits (MSBs) of image data signals of two neighboring data lines, such that when all of the N MSBs are equal to 1 or 0, the output of the logic circuit is 1, otherwise, the output of the logic circuit is 0, and a MUX coupled to the data processing unit and adapted for receiving a frame polarity control signal, FramePOL, and a pixel polarity control signal, XPOL, and selectively outputting the frame polarity control signal FramePOL when the output of the logic circuit is 1, or the pixel polarity control signal POL when the output of the logic circuit is 0, as a polarity control signal, POL.
摘要:
A liquid crystal display includes a source driver, for generating a pixel data voltage, a gate driver, for generating a scanning signal voltage, and a plurality of pixel units. Each pixel unit includes a switch unit for delivering the pixel data voltage upon receiving the scanning signal voltage, a pixel electrode electrically coupled to the switch unit, a first electrode for supplying a first common voltage, a second electrode for supplying a second common voltage, a liquid crystal capacitor electrically coupled between the first electrode and the pixel electrode for driving liquid crystal layer in response to the pixel data voltage and the first common voltage, and a storage capacitor electrically coupled between the pixel electrode and the second electrode.
摘要:
A gate driver and a liquid crystal display using the same are provided. The gate driver includes a scan signal generating unit and a compensation unit. The scan signal generating unit has a plurality of output channels, and is used for sequentially outputting a scan signal through the output channels according to a basic clock and a start pulse. The compensation unit is coupled to the scan signal generating unit, and used for compensating the total resistance of each of the output channels, and sequentially receiving and transmitting the scan signal to a display panel.
摘要:
An exemplary gate output control method includes the following steps: providing a gate control signal; using an angling control signal to angling modulate the gate control signal so as to generate a modulated gate control signal; and supplying the modulated gate control signal to a first integrated gate driver circuit and a second integrated gate driver circuit, to sequentially control the gate outputs of the first integrated gate driver circuit and the second integrated gate driver circuit. A duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the first integrated gate driver circuit is different from another duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the second integrated gate driver circuit.
摘要:
The present invention in one aspect relates to a source driver for driving a display panel to display an image data in an adaptive column inversion. In one embodiment, the source driver includes a data processing unit having a logic circuit adapted for determining N most-significant bits (MSBs) of image data signals of two neighboring data lines, such that when all of the N MSBs are equal to 1 or 0, the output of the logic circuit is 1, otherwise, the output of the logic circuit is 0, and a MUX coupled to the data processing unit and adapted for receiving a frame polarity control signal, FramePOL, and a pixel polarity control signal, XPOL, and selectively outputting the frame polarity control signal FramePOL when the output of the logic circuit is 1, or the pixel polarity control signal POL when the output of the logic circuit is 0, as a polarity control signal, POL.
摘要:
A liquid crystal display includes a source driver, for generating a pixel data voltage, a gate driver, for generating a scanning signal voltage, and a plurality of pixel units. Each pixel unit includes a switch unit for delivering the pixel data voltage upon receiving the scanning signal voltage, a pixel electrode electrically coupled to the switch unit, a first electrode for supplying a first common voltage, a second electrode for supplying a second common voltage, a liquid crystal capacitor electrically coupled between the first electrode and the pixel electrode for driving liquid crystal layer in response to the pixel data voltage and the first common voltage, and a storage capacitor electrically coupled between the pixel electrode and the second electrode.