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公开(公告)号:US09979374B2
公开(公告)日:2018-05-22
申请号:US15496948
申请日:2017-04-25
Applicant: Kumu Networks, Inc.
Inventor: Wilhelm Steffen Hahn , Alfred Riddle , Ernie Landi
CPC classification number: H03H7/32 , H03H7/0115
Abstract: An analog time delay filter circuit including a first delay circuit block arranged in a modular layout, having a first time delay filter, a first input, a first output, and first and second pass-throughs; a second delay circuit block arranged in the same modular layout, having a second time delay filter, a second input, a second output, and third and fourth pass-throughs; and an interposer circuit block that electrically couples the second input to the first pass-through and the second output to the second pass-through.
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公开(公告)号:US09819325B2
公开(公告)日:2017-11-14
申请号:US15382335
申请日:2016-12-16
Applicant: Kumu Networks, Inc.
Inventor: Wilhelm Steffen Hahn , Alfred Riddle , Ernie Landi
CPC classification number: H03H7/32 , H01L2224/48195 , H03H7/0115 , H03H7/1708 , H03H7/1775 , H03H2001/0085
Abstract: A time delay filter comprising a substrate comprising a first surface and a second surface opposite the first surface; a first LC resonator coupled to the substrate and comprising a first coupling point, a first capacitive element electrically coupled between the first coupling point and the first conductive region, and a first inductive element coupled between the first coupling point and the first conductive region, and comprising a first and second inductor tap; and a second LC resonator coupled to the substrate and comprising a second coupling point, a second capacitive element electrically coupled between the second coupling point and the first conductive region, and a second inductive element electrically coupled between the second coupling point and the first conductive region wherein the system group delays a signal output at a second coupling point relative to a signal input at the first coupling point.
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公开(公告)号:US20170310296A1
公开(公告)日:2017-10-26
申请号:US15497167
申请日:2017-04-25
Applicant: Kumu Networks, Inc.
Inventor: Wilhelm Steffen Hahn , Alfred Riddle , Ernie Landi
CPC classification number: H03H7/32 , H01G4/00 , H01G4/002 , H01G4/005 , H01G4/01 , H01G4/012 , H01G4/018 , H01G4/228 , H01G4/232 , H01G4/30 , H01G4/38 , H01G4/385 , H01G9/008 , H01G11/82 , H03H7/01 , H03H7/0115 , H03H7/09 , H03H7/1708 , H03H7/1775 , H03H2001/0085
Abstract: A multilayer fringe capacitor includes first and second interdigitated capacitor electrodes, both parallel to and intersecting a first planar surface; third and fourth interdigitated capacitor electrodes, the first and second electrodes parallel to and separated by a non-zero distance from the third and fourth electrodes; a first set of coupling vias that electrically couples the first electrode to the third electrode; and a second set of coupling vias that electrically couples the second electrode to the fourth electrode.
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