公开(公告)号：US20110239042A1

公开(公告)日：2011-09-29

申请号：US12732841

申请日：2010-03-26

Applicant: Pavan P S ,  Vivek Prakash ,  Mahmoud K. Jibbe

Inventor： Pavan P S ,  Vivek Prakash ,  Mahmoud K. Jibbe

IPC: G06F12/16 ,  G06F11/14 ,  G06F11/16

CPC classification number: G06F11/1076 ,  G06F2211/1014

Abstract: An apparatus comprising a logically contiguous group of at least three drives, a first loop, a second loop, and a compression/decompression circuit. Each of the drives comprises (i) a first region configured to store compressed data of a previous drive, (ii) a second region configured to store uncompressed data of the drive, (iii) a third region configured to store compressed data of a next drive. The first loop may be connected to the next drive in the logically contiguous group. The second loop may be connected to the previous drive of the logically contiguous group. The compression/decompression circuit may be configured to compress and decompress the data stored on each of the drives.

Abstract translation: 一种包括至少三个驱动器的逻辑上连续的组的装置，第一回路，第二回路和压缩/解压缩电路。 每个驱动器包括（i）被配置为存储先前驱动器的压缩数据的第一区域，（ii）被配置为存储驱动器的未压缩数据的第二区域，（iii）被配置为存储下一个驱动器的压缩数据的第三区域 驾驶。 第一个循环可以连接到逻辑上连续的组中的下一个驱动器。 第二个循环可以连接到逻辑上连续的组的先前的驱动器。 压缩/解压缩电路可以被配置为压缩和解压缩存储在每个驱动器上的数据。

公开(公告)号：US20100223427A1

公开(公告)日：2010-09-02

申请号：US12395786

申请日：2009-03-02

Applicant: Heng Po Chan ,  Mahmoud K. Jibbe

Inventor： Heng Po Chan ,  Mahmoud K. Jibbe

IPC: G06F13/00 ,  G06F12/00

CPC classification number: G06F3/0659 ,  G06F3/0611 ,  G06F3/067 ,  H04L49/90

Abstract: An apparatus comprising a remote storage array, a primary storage array and a network. The remote storage array may be configured to (i) define a queue size based on a performance capability of the remote storage array, (ii) generate a multiplier based on resources being used by the remote storage array, and (iii) adjust the queue size by the multiplier. The primary storage array may be configured to execute input/output (IO) requests between the remote storage array and the primary storage array based on the adjusted queue size. The network may be configured to connect the remote storage array to the primary storage array.

Abstract translation: 一种包括远程存储阵列，主存储阵列和网络的装置。 远程存储阵列可以被配置为（i）基于远程存储阵列的性能能力来定义队列大小，（ii）基于由远程存储阵列使用的资源生成乘法器，以及（iii）调整队列 大小乘以乘数。 主存储阵列可以被配置为基于调整的队列大小在远程存储阵列和主存储阵列之间执行输入/输出（IO）请求。 网络可以被配置为将远程存储阵列连接到主存储阵列。

公开(公告)号：US20100131581A1

公开(公告)日：2010-05-27

申请号：US12324224

申请日：2008-11-26

Applicant: Mahmoud K. Jibbe ,  Srirang Heroor

Inventor： Mahmoud K. Jibbe ,  Srirang Heroor

IPC: G06F15/16 ,  G06F13/00

CPC classification number: G06F11/2294

Abstract: A method comprising the steps of (A) generating a call for a first operating system at a host, (B) sending the call for the first operating system from the host to a storage array over a network, (C) generating a response to the call for the first operating system from the host, (D) sending the response from the storage array to the host over the network and (E) capturing and storing the response in a device.

Abstract translation: 一种方法，包括以下步骤：（A）生成对主机的第一操作系统的呼叫，（B）通过网络将所述第一操作系统的呼叫从所述主机发送到存储阵列;（C）产生响应 从主机呼叫第一个操作系统，（D）通过网络将存储阵列的响应发送到主机，（E）在设备中捕获和存储响应。

公开(公告)号：US07308397B2

公开(公告)日：2007-12-11

申请号：US10610154

申请日：2003-06-30

Applicant: Mahmoud K. Jibbe ,  Chin Khor

Inventor： Mahmoud K. Jibbe ,  Chin Khor

IPC: G06F9/455 ,  G06F3/00 ,  G06F19/00

CPC classification number: G06F11/261

Abstract: A method for controlling and emulating the functional and logical behaviors of an array of storage devices is established by loading a software module to an array controller board. The software module is integrated into the array controller subsystem manager by providing the necessary parameters required to insert the device and can control the inbound and outbound activities (commands, data, and status packages) regardless of the type, interface, and protocol of the disk/tape device. This aspect of the method allows the user to control the drive state transition and inject errors on the inbound and outbound drive traffics. Also, the method of this invention allows the drive module to recover in case of an array controller failure and to be removed from a list of devices like a regular drive.

Abstract translation: 通过将软件模块加载到阵列控制器板来建立用于控制和仿真存储设备阵列的功能和逻辑行为的方法。 软件模块通过提供插入设备所需的必要参数并可以控制入站和出站活动（命令，数据和状态包）而集成到阵列控制器子系统管理器中，而不管磁盘的类型，接口和协议如何 /磁带设备。 该方法的这一方面允许用户控制驱动器状态转换并在入站和出站驱动器流量上注入错误。 此外，本发明的方法允许驱动模块在阵列控制器故障的情况下恢复，并从诸如常规驱动器的设备列表中移除。

公开(公告)号：US5375217A

公开(公告)日：1994-12-20

申请号：US857539

申请日：1992-03-25

Applicant: Mahmoud K. Jibbe ,  Craig C. McCombs

Inventor： Mahmoud K. Jibbe ,  Craig C. McCombs

IPC: G06F3/06 ,  G06F13/12 ,  G11B19/28 ,  G06F13/00

CPC classification number: G06F3/0601 ,  G06F13/126 ,  G11B19/28 ,  G06F2003/0692

Abstract: A simple method and circuit for qualifying and combining individual request signals received from a plurality of disk drives within a disk array to generate a single, synchronized request signal for the disk array. The circuit includes an activity register for storing a bit pattern which identifies those disk drives which are in use within the array. Each bit position within the activity corresponds to a different disk drive within the disk array. A logic one stored in a bit position identifies the disk drive corresponding to the bit position as being active while a logic zero stored in a bit position identifies the disk drive corresponding to the bit position as being inactive. The circuit further includes an OR gate associated with each disk drive within the disk array, each OR gate having a first input connected to receive the bit information corresponding to its associated disk drive from the activity register, and a second inverting input for receiving the individual request signal from its associated disk drive. The outputs of the OR gates are provided to an AND logic operator which combines the received signals to generate the request signal for the array. Additionally, the circuit includes a NAND gate associated with each disk drive within the disk array. Each NAND gate has a first input connected to receive the bit corresponding to its associated disk drive from the activity register, and a second input for receiving an acknowledge signal for the disk array. The NAND gates function to provide individual acknowledge signals to the active disk drives within the array.

Abstract translation: 一种简单的方法和电路，用于对从盘阵列中的多个磁盘驱动器接收到的各个请求信号进行合格和组合，以生成用于磁盘阵列的单个同步的请求信号。 该电路包括一个活动寄存器，用于存储识别那些在阵列内使用的那些磁盘驱动器的位模式。 活动中的每个位位置对应于磁盘阵列中的不同磁盘驱动器。 存储在位位置的逻辑1将与位位置相对应的磁盘驱动器识别为活动状态，而存储在位位置中的逻辑0将与位位置相对应的磁盘驱动器识别为不活动。 电路还包括与磁盘阵列内的每个磁盘驱动器相关联的或门，每个或门具有连接以从活动寄存器接收对应于其相关联的磁盘驱动器的位信息的第一输入，以及用于接收个体的第二反相输入 来自其相关磁盘驱动器的请求信号。 OR门的输出提供给AND逻辑运算符，该逻辑运算符组合接收到的信号以产生阵列的请求信号。 此外，电路包括与盘阵列内的每个盘驱动器相关联的NAND门。 每个NAND门具有第一输入，其连接以从活动寄存器接收与其相关联的盘驱动器相对应的位，以及用于接收用于磁盘阵列的确认信号的第二输入。 NAND门用于向阵列内的活动磁盘驱动器提供单独的确认信号。

公开(公告)号：US5179704A

公开(公告)日：1993-01-12

申请号：US668641

申请日：1991-03-13

Applicant: Mahmoud K. Jibbe ,  Craig C. McCombs

Inventor： Mahmoud K. Jibbe ,  Craig C. McCombs

IPC: G06F3/06 ,  G06F9/48 ,  G06F13/24

CPC classification number: G06F3/0601 ,  G06F13/24 ,  G06F2003/0692

Abstract: An interrupt signal for a disk array is generated by selectively combining interrupt signals received from the individual disk drives and other interrupt signal sources within the disk array. The circuit for generating the array interrupt signal includes logic for combining a first group of selected interrupt signals to generate a group interrupt signal having a HIGH state when each one of the signals in the first group is at a HIGH state, and logic which combines a second group of selected interrupt signals to generate an independent interrupt signal having a HIGH state when any one of the interrupt signals of the second group is at a HIGH state. The group and independent interrupt signals are gated together through use of an OR gate to generate the disk array interrupt signal. The logic for generating the group and independent interrupt signals can be reconfigured to combine, pass or ignore interrupt signals as selected by the system user. The circuit includes filtering and latching mechanisms to prevent interference with an existing array interrupt signal during reconfiguration of the group or independent interrupt logic.

公开(公告)号：US08819302B2

公开(公告)日：2014-08-26

申请号：US13158621

申请日：2011-06-13

Applicant: Madhukar Gunjan Chakhaiyar ,  Mahmoud K. Jibbe

Inventor： Madhukar Gunjan Chakhaiyar ,  Mahmoud K. Jibbe

IPC: G06F3/00 ,  G06F5/00

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0689

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a plurality of intermediate signals in response to a plurality of input/output requests. The second circuit may be configured to generate a plurality of processed input/output requests in response to the plurality of input/output requests. The processed input/output requests may be configured to be processed by a drive controller to access a drive array in accordance with a protocol used to process the input/output requests.

Abstract translation: 一种包括第一电路和第二电路的装置。 第一电路可以被配置为响应于多个输入/输出请求而产生多个中间信号。 第二电路可以被配置为响应于多个输入/输出请求而产生多个经处理的输入/输出请求。 经处理的输入/输出请求可被配置为由驱动器控制器处理，以根据用于处理输入/输出请求的协议访问驱动器阵列。

公开(公告)号：US08694723B2

公开(公告)日：2014-04-08

申请号：US13096126

申请日：2011-04-28

Applicant: Madhukar Gunjan Chakhaiyar ,  Mahmoud K. Jibbe

Inventor： Madhukar Gunjan Chakhaiyar ,  Mahmoud K. Jibbe

IPC: G06F13/12 ,  G06F13/36

CPC classification number: G06F13/385 ,  G06F3/0605 ,  G06F3/0658 ,  G06F3/0661 ,  G06F3/0683 ,  G06F2213/0028 ,  G06F2213/3802 ,  Y02D10/14 ,  Y02D10/151

Abstract: An apparatus comprising an interface, a first port, and a second port. The interface may be configured to connect to a host computer. The first port may be configured to connect to a first set of storage devices using a first protocol. The second port may be configured to connect to a second set of storage devices using a second protocol. The apparatus may provide support for the first protocol and the second protocol to allow communication using both the first protocol and the second protocol through the interface.

Abstract translation: 一种包括接口，第一端口和第二端口的设备。 该接口可以被配置为连接到主计算机。 第一端口可以被配置为使用第一协议来连接到第一组存储设备。 第二端口可以被配置为使用第二协议来连接到第二组存储设备。 该装置可以为第一协议和第二协议提供支持，以允许通过接口使用第一协议和第二协议的通信。

公开(公告)号：US20120331222A1

公开(公告)日：2012-12-27

申请号：US13166146

申请日：2011-06-22

Applicant: Mahmoud K. Jibbe ,  Manjunath Balgatte Gangadharan ,  Chandan A. Marathe ,  Natesh Somanna

Inventor： Mahmoud K. Jibbe ,  Manjunath Balgatte Gangadharan ,  Chandan A. Marathe ,  Natesh Somanna

IPC: G06F12/16

CPC classification number: G06F12/0868 ,  G06F12/0897 ,  G06F2212/217

Abstract: An apparatus comprising an array controller and a cache. The array controller may be configured to read/write data to a first array of drives of a first drive type in response to one or more input/output requests. The cache may be configured to (i) receive said input/output requests from the array controller, (ii) temporarily store the input/output requests, and (iii) read/write data to a second array of drives of a second drive type in response to the input/output requests. The first array of drives may be configured to copy the data directly to/from the second array of drives during a cache miss condition such that the array controller retrieves the data stored in the first array of drives through the second array of drives without writing the data to the cache.

Abstract translation: 一种包括阵列控制器和高速缓存的装置。 阵列控制器可以被配置为响应于一个或多个输入/输出请求将数据读取/写入到第一驱动器类型的驱动器的第一阵列。 高速缓存可以被配置为（i）从阵列控制器接收所述输入/输出请求，（ii）临时存储输入/输出请求，以及（iii）将数据读取/写入第二驱动类型的第二驱动器阵列 响应输入/输出请求。 可以将第一驱动器阵列配置为在高速缓存未命中状态期间将数据直接复制到/从第二驱动器阵列，使得阵列控制器通过第二驱动器阵列检索存储在第一驱动器阵列中的数据，而不写入 数据到缓存。

公开(公告)号：US20120265932A1

公开(公告)日：2012-10-18

申请号：US13085713

申请日：2011-04-13

Applicant: Mahmoud K. Jibbe ,  Chandan A. Marathe ,  Manjunath Balagatte Gangadharan ,  Natesh Somanna

Inventor： Mahmoud K. Jibbe ,  Chandan A. Marathe ,  Manjunath Balagatte Gangadharan ,  Natesh Somanna

IPC: G06F12/16

CPC classification number: G06F3/0604 ,  G06F3/0631 ,  G06F3/0632 ,  G06F3/0685 ,  G06F3/0689

Abstract: An apparatus comprising a controller and a plurality of storage drives. The controller may be configured to generate a control signal in response to one or more input/output requests. The plurality of storage drives may be arranged as one or more volumes. Each of the volumes may comprise a plurality of drive groups. Each of the drive groups may comprise a particular type of storage drive. The controller may be configured to form the volume across drives from two or more of the groups.

Abstract translation: 一种装置，包括控制器和多个存储驱动器。 控制器可以被配置为响应于一个或多个输入/输出请求而产生控制信号。 多个存储驱动器可以被布置为一个或多个卷。 每个卷可以包括多个驱动组。 每个驱动器组可以包括特定类型的存储驱动器。 控制器可以被配置为跨越来自两个或更多个组的驱动器形成卷。