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公开(公告)号：US07122899B2
公开(公告)日：2006-10-17
申请号：US10133336
申请日：2002-04-26
IPC分类号： H01L23/45
CPC分类号： H01L23/576 , H01L28/20 , H01L29/41733 , H01L29/458 , H01L29/78618 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： An ohmic resistance is present between two parts of a conductor layer so that the size of the ohmic resistance can be ascertained and/or a semiconductor region is present in or on a layer forming the dielectric. The conductor layer is structured into a gate contact, a source contact, and a drain contact so that a transistor function or switching function is possible in the semiconductor region. Such a configuration allows an attempt to analyze the circuit integrated in the chip to be detected.
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32.发明授权Method for producing cavities with submicrometer patterns in a semiconductor device using a freezing process liquid 失效在使用冷冻处理液的半导体装置中制造具有亚微米图形的空腔的方法公开(公告)号：US06734095B2
公开(公告)日：2004-05-11
申请号：US10230774
申请日：2002-08-29
IPC分类号： H01L214763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method for producing cavities, which are patterned in submicrometer dimensions, in a cavity layer of a semiconductor device, is described. In the method, a process liquid is frozen in the trenches in a process layer which has been patterned by ribs and trenches, then the process liquid is covered with a covering layer and is then expelled from the cavities resulting from the covering of the trenches.
摘要翻译： 描述了在半导体器件的空腔层中制造以亚微米尺寸图案化的空腔的方法。 在该方法中，处理液在通过肋和沟槽图案化的处理层中的沟槽中冷冻，然后处理液体被覆盖层覆盖，然后从由沟槽覆盖产生的空腔中排出。
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33.发明授权Method of discharging reaction water in PEM fuel cells and fuel cell for carrying out the method 失效在PEM燃料电池和燃料电池中排出反应水的方法，用于实施该方法公开(公告)号：US06576358B2
公开(公告)日：2003-06-10
申请号：US09822018
申请日：2001-03-30
IPC分类号： H01M804
CPC分类号： H01M8/1004 , H01M8/04156 , H01M8/04291 , H01M2300/0082
摘要： Discharging the reaction water from the novel PEM fuel cells does not require humidification of the reaction gases or an increase in the gas pressure. This is attained in that a hydrophobic layer on the cathode side is used which has a smaller pore size than the layer on the anode side. The reaction water is removed via the anode during the operation of the fuel cell.
摘要翻译： 从新型PEM燃料电池排出反应水不需要加湿反应气体或增加气体压力。 这是通过使用阴极侧的疏水层，其具有比阳极侧的层更小的孔径。 在燃料电池运行期间，反应水通过阳极被去除。
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公开(公告)号：US08822329B2
公开(公告)日：2014-09-02
申请号：US12567950
申请日：2009-09-28
申请人： Rainer Leuschner , Gunther Mackh , Uwe Seidel
发明人： Rainer Leuschner , Gunther Mackh , Uwe Seidel
IPC分类号： H01L23/535 , H01L21/768 , H01L23/522
CPC分类号： H01L21/76898 , H01L21/76807 , H01L21/7681 , H01L21/76816 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76847 , H01L21/76877 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： One or more embodiments relate to a method for making a semiconductor structure, the method including: forming a first conductive interconnect at least partially through the substrate; and forming a second conductive interconnect over the substrate, wherein the first conductive interconnect and the second conductive interconnect are formed at least partially simultaneously.
摘要翻译： 一个或多个实施例涉及一种用于制造半导体结构的方法，所述方法包括：至少部分地通过所述衬底形成第一导电互连; 以及在所述衬底上形成第二导电互连，其中所述第一导电互连和所述第二导电互连至少部分地同时形成。
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35.发明授权Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module 失效集成电路; 集成电路制造方法; 降低磁场影响的方法; 内存模块公开(公告)号：US07697322B2
公开(公告)日：2010-04-13
申请号：US11775599
申请日：2007-07-10
IPC分类号： G11C11/00
CPC分类号： G11C11/15 , H01L27/222 , H01L43/08
摘要： Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.
摘要翻译： 本发明的实施例一般涉及集成电路，集成电路的制造方法，减小磁场影响的方法以及存储器模块。 在本发明的实施例中，提供了具有磁性隧道结的集成电路。 磁性隧道结可以包括具有通过施加通过磁性隧道结的写入电流而选择的磁化取向的自由层，以及在低于保持温度的温度下保持自由层的可选磁化取向的保留层。
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36.发明授权Method for programming an integrated circuit, method for programming a plurality of cells, integrated circuit, cell arrangement 失效用于编程集成电路的方法，用于编程多个单元的方法，集成电路，单元布置公开(公告)号：US07660151B2
公开(公告)日：2010-02-09
申请号：US11856665
申请日：2007-09-17
申请人： Rainer Leuschner
发明人： Rainer Leuschner
IPC分类号： G11C11/00
CPC分类号： G11C5/02 , G11C11/1675
摘要： Embodiment of the invention provide a method for programming an integrated circuit, methods for programming a plurality of cells, an integrated circuit, and a cell arrangement. An embodiment of the invention provides a method for programming an integrated circuit having a plurality of cells. The method includes grouping the plurality of cells into a first group of cells and a second group of cells depending on the cell state the cells should be programmed with. The first group of cells and the second group of cells each having a plurality of cells. The method further includes concurrently programming the cells of the first group of cells with a first cell state. After having programmed the cells of the first group of cells, the cells of the second group of cells are concurrently programmed with a second cell state, which is different from the first cell state.
摘要翻译： 本发明的实施例提供了一种用于编程集成电路的方法，用于编程多个单元的方法，集成电路和单元布置。 本发明的实施例提供了一种用于编程具有多个单元的集成电路的方法。 该方法包括根据细胞应该编程的细胞状态将多个细胞分组成第一组细胞和第二组细胞。 第一组细胞和第二组细胞各自具有多个细胞。 该方法还包括以第一单元状态同时编程第一组单元的单元。 在编程了第一组单元的单元之后，第二组单元的单元同时被编程为与第一单元状态不同的第二单元状态。
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37.发明申请Integrated Circuit, Memory Cell Array, Memory Module, and Method of Operating an Integrated Circuit 有权集成电路，存储单元阵列，存储器模块和操作集成电路的方法公开(公告)号：US20090273966A1
公开(公告)日：2009-11-05
申请号：US12114466
申请日：2008-05-02
IPC分类号： G11C11/02
CPC分类号： G11C11/1675 , G11C11/1659
摘要： According to one embodiment of the present invention, an integrated circuit includes a plurality of thermal selectable memory cells, each memory cell being connected to a conductive line, the conductive line having a first portion for applying a heating current, and a second portion for applying a programming current. The integrated circuit is configured such that the heating current and the programming current can be routed respectively to the first and the second portion of the conductive line independently from each other.
摘要翻译： 根据本发明的一个实施例，集成电路包括多个热可选择存储单元，每个存储单元连接到导电线，该导线具有用于施加加热电流的第一部分和用于施加加热电流的第二部分 编程电流。 集成电路被配置为使得加热电流和编程电流可以彼此独立地分别路由到导线的第一和第二部分。
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38.发明申请Semiconductor Device, Memory Module, and Method of Manufacturing a Semiconductor Device 审中-公开半导体器件，存储器模块和制造半导体器件的方法公开(公告)号：US20090273044A1
公开(公告)日：2009-11-05
申请号：US12115248
申请日：2008-05-05
申请人： Rainer Leuschner
发明人： Rainer Leuschner
CPC分类号： H01L23/552 , H01L27/222 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment of the present invention, a semiconductor device is provided including a semiconductor chip. The semiconductor chip is at least partly surrounded by a surrounding structure. The semiconductor chip further includes a magneto-resistive memory cell. A shielding layer is disposed between the semiconductor chip and the surrounding structure, wherein the shielding layer is configured to shield the magneto-resistive memory cell from external magnetic fields.
摘要翻译： 根据本发明的一个实施例，提供了包括半导体芯片的半导体器件。 半导体芯片至少部分地被周围的结构所包围。 半导体芯片还包括磁阻存储单元。 屏蔽层设置在半导体芯片和周围结构之间，其中屏蔽层被配置为将磁阻存储器单元与外部磁场屏蔽。
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39.发明申请公开(公告)号：US20090016096A1
公开(公告)日：2009-01-15
申请号：US11775599
申请日：2007-07-10
CPC分类号： G11C11/15 , H01L27/222 , H01L43/08
摘要： Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.
摘要翻译： 本发明的实施例一般涉及集成电路，集成电路的制造方法，减小磁场影响的方法以及存储器模块。 在本发明的实施例中，提供了具有磁性隧道结的集成电路。 磁性隧道结可以包括具有通过施加通过磁性隧道结的写入电流而选择的磁化取向的自由层，以及在低于保持温度的温度下保持自由层的可选磁化取向的保留层。
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公开(公告)号：US07259025B2
公开(公告)日：2007-08-21
申请号：US11644792
申请日：2006-12-22
IPC分类号： H01L21/00
CPC分类号： H01L21/76852 , H01L21/76873 , H01L21/76874 , H01L21/76885 , H01L27/228 , H01L43/12
摘要： A method of forming a ferromagnetic liner on conductive lines of magnetic memory devices and a structure thereof. The ferromagnetic liner increases the flux concentration of current run through the conductive lines, reducing the amount of write current needed to switch magnetic memory cells. The conductive lines are formed in a plate-up method, and the ferromagnetic liner is selectively formed on the plated conductive lines. The ferromagnetic liner may also be formed over conductive lines and a top portion of vias in a peripheral region of the workpiece.
摘要翻译： 一种在磁存储器件的导线上形成铁磁衬垫的方法及其结构。 铁磁衬垫增加了通过导线延伸的电流的通量浓度，从而减少了切换磁存储单元所需的写入电流。 导电线以平板化方式形成，并且铁电衬里选择性地形成在镀覆的导电线上。 铁磁衬垫也可以形成在工件的外围区域中的导电线和通孔的顶部上。
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