公开(公告)号：US10949101B2

公开(公告)日：2021-03-16

申请号：US16284273

申请日：2019-02-25

Applicant: Micron Technology, Inc.

Inventor： Richard C. Murphy ,  Glen E. Hush ,  Vijay S. Ramesh ,  Allan Porterfield ,  Anton Korzh

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/0868 ,  G06F12/02

Abstract: Systems, apparatuses, and methods related to storage device operation orchestration are described. A plurality of computing devices (or “tiles”) can be coupled to a controller (e.g., an “orchestration controller”) and an interface. The controller can control operation of the computing devices. For instance, the controller can include circuitry to request a block of data from a memory device coupled to the apparatus, cause a processing unit of at least one computing device of the plurality of computing devices to perform an operation on the block of data in which at least some of the data is ordered, reordered, removed, or discarded, and cause, after some of the data is ordered, reordered, removed, or discarded, the block of data to be transferred to the interface coupled to the plurality of computing devices.

公开(公告)号：US10910048B1

公开(公告)日：2021-02-02

申请号：US16744541

申请日：2020-01-16

Applicant: Micron Technology, Inc.

Inventor： Vijay S. Ramesh ,  Allan Porterfield

IPC: G11C11/00 ,  G11C13/00 ,  G06F9/54 ,  G06F9/30 ,  G06F7/57

Abstract: Systems, apparatuses, and methods related to extended memory communication subsystems for performing extended memory operations are described. An example method can include receiving, at a processing unit that is coupled between a host device and a non-volatile memory device, signaling indicative of a plurality of operations to be performed on data written to or read from the non-volatile memory device. The method can further include performing, at the processing unit, at least one operation of the plurality of operations in response to the signaling. The method can further include accessing a portion of a memory array in the non-volatile memory device. The method can further include transmitting additional signaling indicative of a command to perform one or more additional operations of the plurality of operations on the data written to or read from the non-volatile memory device.

公开(公告)号：US20200272344A1

公开(公告)日：2020-08-27

申请号：US16284273

申请日：2019-02-25

Applicant: Micron Technology, Inc.

Inventor： Richard C. Murphy ,  Glen E. Hush ,  Vijay S. Ramesh ,  Allan Porterfield ,  Anton Korzh

IPC: G06F3/06 ,  G06F12/0868 ,  G06F12/02

Abstract: Systems, apparatuses, and methods related to storage device operation orchestration are described. A plurality of computing devices (or “tiles”) can be coupled to a controller (e.g., an “orchestration controller”) and an interface. The controller can control operation of the computing devices. For instance, the controller can include circuitry to request a block of data from a memory device coupled to the apparatus, cause a processing unit of at least one computing device of the plurality of computing devices to perform an operation on the block of data in which at least some of the data is ordered, reordered, removed, or discarded, and cause, after some of the data is ordered, reordered, removed, or discarded, the block of data to be transferred to the interface coupled to the plurality of computing devices.

公开(公告)号：US10606775B1

公开(公告)日：2020-03-31

申请号：US16236188

申请日：2018-12-28

Applicant: Micron Technology, Inc.

Inventor： Richard C. Murphy ,  Glen E. Hush ,  Vijay S. Ramesh ,  Allan Porterfield ,  Anton Korzh

IPC: G06F13/16 ,  G06F15/78

Abstract: Systems, apparatuses, and methods related to a computing tile are described. The computing tile may perform operations on received data to extract some of the received data. The computing tile may perform operations without intervening commands. The computing tile may perform operations on data streamed through the computing tile to extract relevant data from data received by the computing tile. In an example, the computing tile is configured to receive a command to initiate an operation to reduce a size of a block of data from a first size to a second size. The computing tile can then receive a block of data from a memory device coupled to the apparatus. The computing tile can then perform an operation on the block of data to extract predetermined data from the block of data to reduce a size of the block of data from a first size to a second size.