公开(公告)号：US10606300B2

公开(公告)日：2020-03-31

申请号：US16273528

申请日：2019-02-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wei Lu Chu

IPC: G05F3/02 ,  G05F3/30 ,  G11C5/14

Abstract: Apparatuses, methods, and current generators that generate current are described. An example apparatus includes a current source configured to provide a current. The current source may be coupled to a voltage source via a transistor. The transistor may be configured to provide the voltage source to the current source based on a voltage of a gate of the transistor. The example apparatus may further include an amplifier configured to provide a voltage to the gate of the transistor based on a voltage differential between two inputs. The voltage differential between the two inputs may adjust due to process, voltage or temperature changes such that the current provided by the current source remains constant.

公开(公告)号：US10331151B1

公开(公告)日：2019-06-25

申请号：US16203320

申请日：2018-11-28

Applicant: Micron Technology, Inc.

Inventor： Wei Lu Chu

IPC: G05F1/56 ,  G05F1/567 ,  G05F3/30 ,  G05F1/46 ,  G05F1/59

Abstract: Systems and devices are provided for generating a process, voltage, temperature (PVT)-independent reference current in a resource-efficient manner. A semiconductor device may include a bandgap circuit that outputs a reference voltage and gate signal. The semiconductor device may also include a reference current circuit that includes a complementary-to-absolute-temperature (CTAT) current generation portion and a variation-independent reference current generation portion. The variation-independent reference current generation portion may receive the gate signal from the bandgap circuit, apply the gate signal to a proportion-to-absolute temperature (PTAT) branch of the variation-independent reference current generation portion, and generate mirror PTAT and CTAT currents. The reference current circuit may also include a reference node that generates the reference current supply based at least in part on the mirror CTAT current and the mirror PTAT current.

公开(公告)号：US20180341282A1

公开(公告)日：2018-11-29

申请号：US16053765

申请日：2018-08-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wei Lu Chu

IPC: G05F1/59 ,  G05F1/46 ,  G05F1/563 ,  G05F3/24 ,  G05F1/567

Abstract: Apparatuses and methods for providing a current independent of temperature are described. An example apparatus includes a current generator that includes two components that are configured to respond equally and opposite to changes in temperature. The responses of the two components may allow a current provided by the current generator to remain independent of temperature. One of the two components in the current generator may mirror a component included in a voltage source that is configured to provide a voltage to the current generator.

公开(公告)号：US20180284820A1

公开(公告)日：2018-10-04

申请号：US16000220

申请日：2018-06-05

Applicant: Micron Technology, Inc.

Inventor： Wei Lu Chu ,  Dong Pan

IPC: G05F1/46 ,  G05F3/30 ,  G05F1/575 ,  G05F1/59

CPC classification number: G05F1/468 ,  G05F1/461 ,  G05F1/575 ,  G05F1/59 ,  G05F3/262 ,  G05F3/30

Abstract: An apparatus is described comprising a bandgap reference circuit comprising: an amplifier including first and second inputs and an output; and a bandgap transistor coupled to the output of the amplifier at a control electrode thereof, the bandgap transistor being further coupled commonly to the first and second inputs of the amplifier at a first electrode thereof to form a feedback path. The apparatus further comprises a resistor coupled to the first electrode of the bandgap transistor.

公开(公告)号：US11804255B2

公开(公告)日：2023-10-31

申请号：US17393597

申请日：2021-08-04

Applicant: Micron Technology, Inc.

Inventor： Zhi Qi Huang ,  Wei Lu Chu

IPC: G11C11/4074 ,  G05F3/26 ,  H03F3/45

CPC classification number: G11C11/4074 ,  G05F3/262 ,  H03F3/45269 ,  H03F3/45273

Abstract: A memory device includes a voltage generator configured to generate a reference voltage for transmission to at least one component of the memory device. The voltage generator includes a first input to receive a first signal having a first voltage value. The voltage generator also includes a second input to receive a second signal having a second voltage value. The voltage generator further includes a first circuit configured to generate third voltage and a second circuit coupled to the first circuit to receive the third voltage value, wherein the second circuit receives the first signal and the second signal and is configured to utilize the third voltage value to facilitate comparison of the first voltage value and the second voltage value to generate an output voltage.

公开(公告)号：US20230014458A1

公开(公告)日：2023-01-19

申请号：US17377148

申请日：2021-07-15

Applicant: Micron Technology, Inc.

Inventor： Wei Lu Chu

IPC: H03F3/45

Abstract: An amplifier may include multiple transistors with two transistors having their gates tied together via a common connection. The amplifier may utilize a local common mode feedback resistor as part of the amplifier. The local common mode feedback resistor may be coupled between the common connection and respective terminals of two transistors of multiple transistors. The local common mode feedback resistor may include a group of resistors coupled in series. The local common mode feedback resistor may also include a metal oxide semiconductor (MOS) resistor coupled in parallel with one or more of the first group of resistors. In the local common mode feedback, the first MOS resistor provides different levels of resistance to different process corners to reduce overshoot when the amplifier is enabled.

公开(公告)号：US11335396B1

公开(公告)日：2022-05-17

申请号：US16952804

申请日：2020-11-19

Applicant: Micron Technology, Inc.

Inventor： Zhi Qi Huang ,  Wei Lu Chu ,  Dong Pan

IPC: G11C11/4076 ,  G11C7/22 ,  G11C11/22

Abstract: Methods, systems, and devices for timing signal delay for a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. A memory device may include delay components having a configurable impedance based at least in part on one or more fabrication characteristics of the memory device, one or more operating conditions of the memory device, one or more bias voltages, or a combination thereof.

公开(公告)号：US11262783B2

公开(公告)日：2022-03-01

申请号：US16096638

申请日：2018-08-28

Applicant: Micron Technology, Inc.

Inventor： Wei Lu Chu

IPC: G05F1/10 ,  G05F3/30 ,  G05F1/46 ,  G05F3/02 ,  H03K17/22

Abstract: A semiconductor device may include a bandgap circuit that outputs a reference voltage. The semiconductor device may also include a startup circuit coupled to the bandgap circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap circuit in response to the bandgap circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the reference voltage being greater than a threshold.

公开(公告)号：US11227650B1

公开(公告)日：2022-01-18

申请号：US17002398

申请日：2020-08-25

Applicant: Micron Technology, Inc.

Inventor： Zhi Qi Huang ,  Wei Lu Chu ,  Dong Pan

IPC: G11C8/18 ,  G11C11/4076

Abstract: An electronic device includes a first input that receives an input signal when the electronic device is in operation, a long L gate comprising a long L transistor, a first activation transistor coupled to a gate of the long L transistor, and a second activation transistor coupled to the gate of the long L transistor. The electronic device also includes a switch directly coupled to a second input of the long L gate, a path directly coupled to a first output of the long L gate, a capacitor coupled to the path, and a second output that when in operation transmits an output signal as a delayed signal with respect to the input signal.

公开(公告)号：US11200927B2

公开(公告)日：2021-12-14

申请号：US16843628

申请日：2020-04-08

Applicant: Micron Technology, Inc.

Inventor： Zhi Qi Huang ,  Wei Lu Chu ,  Dong Pan

IPC: G11C8/00 ,  G11C7/22 ,  G11C7/04 ,  G11C7/10

Abstract: Methods, systems, and devices for timing signal delay compensation in a memory device are described. In some memory devices, operations for accessing memory cells may be performed with timing that is asynchronous relative to an input signal. To support asynchronous timing, a memory device may include delay components that support generating a timing signal having aspects that are delayed relative to an input signal. In accordance with examples as disclosed herein, a memory device may include delay components having a variable and configurable impedance, where the configurable impedance may be based at least in part on a configuration signal generated at the memory device. A configuration signal may be generated based on fabrication characteristics of the memory device, or based on operating conditions of the memory device, or various combinations thereof.