公开(公告)号：US09305504B2

公开(公告)日：2016-04-05

申请号：US14074730

申请日：2013-11-08

Applicant: Novatek Microelectronics Corp.

Inventor： Teng-Jui Yu ,  Li-Tang Lin ,  Chia-Wei Su ,  Chu-Ya Hsiao

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3614

Abstract: A liquid crystal display panel and a display device are provided. The liquid crystal display includes a first common electrode, a second common electrode and pixels. The second common electrode and the first common electrode are electrically independent from each other. First pixels of the pixels are coupled to the first common electrode, and second pixels of the pixels are coupled to the second common electrode. Accordingly, usage or operation of the liquid crystal display panel is more flexible.

Abstract translation: 提供了一种液晶显示面板和显示装置。 液晶显示器包括第一公共电极，第二公共电极和像素。 第二公共电极和第一公共电极彼此电独立。 像素的第一像素被耦合到第一公共电极，并且像素的第二像素耦合到第二公共电极。 因此，液晶显示面板的使用或操作更加灵活。

公开(公告)号：US09299285B2

公开(公告)日：2016-03-29

申请号：US14010502

申请日：2013-08-26

Applicant: NOVATEK Microelectronics Corp.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/2096

Abstract: A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.

Abstract translation: 一种对应于多个源驱动装置的定时控制装置的定时加扰方法，包括根据时钟信号调整选择信号; 根据选择信号选择多个扰频产生单元之一以产生定时加扰信号; 以及根据所述定时加扰信号产生所述多个源驱动装置的加扰数据。

公开(公告)号：US09215170B2

公开(公告)日：2015-12-15

申请号：US14301310

申请日：2014-06-10

Applicant: Novatek Microelectronics Corp.

Inventor： Chia-Wei Su ,  Chu-Ya Hsiao

IPC: H04L12/741 ,  H04L25/02 ,  H04L25/49

CPC classification number: H04L25/4908 ,  H04L25/0272 ,  H04L45/74

Abstract: A method for transporting data with embedded information is provided. The method is adapted to a data transmission interface for coding an original data and then transporting thereof, including: packing the original data, wherein every N bits form a packet, and N is an integer of at least 4; analyzing whether or not existing a long-run length of long-run data with consecutive same bit data in the packet, wherein when the long-run length is greater than a predetermined length, bit data with a predetermined bit length after an Lth bit of the long-run data is toggled; coding the packet to embed a coding information, wherein the coding information determines whether or not the long-run data has been toggled; and transporting the coded packet.

Abstract translation: 提供了一种用嵌入信息传输数据的方法。 该方法适用于数据传输接口，用于对原始数据进行编码，然后传输，包括：打包原始数据，其中每N位形成分组，N为至少4的整数; 分析是否存在具有连续相同位数据的长期数据的长期数据，其中当长行长度大于预定长度时，在第L位之后具有预定位长度的位数据 长期数据切换; 编码分组以嵌入编码信息，其中编码信息确定长时间数据是否已被切换; 并传送编码包。

公开(公告)号：US09123275B2

公开(公告)日：2015-09-01

申请号：US13778122

申请日：2013-02-27

Applicant: Novatek Microelectronics Corp.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su ,  Po-Yu Tseng ,  Po-Hsiang Fang ,  Hsin-Hung Lee

IPC: G09G3/00 ,  G09G3/36

CPC classification number: G09G3/006 ,  G09G3/3688 ,  G09G2330/12 ,  G09G2370/08

Abstract: A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Abstract translation: 提供了一种用于显示显示器的数据通道的错误率的方法。 显示器的定时控制器经由显示器的第一和第二数据通道重复地将特定格式的测试信号发送到显示器的第一和第二源驱动器。 在测试期间，分别计数第一源驱动器和第二源驱动器的第一次数和第二次数，以确定所接收的测试信号不具有特定格式。 第一和第二源驱动器分别根据计数的第一和第二次数来分别显示显示器的面板的第一区域和第二区域。 因此，数据通道的错误率以更容易识别错误率的方式呈现在显示器的面板上。

公开(公告)号：US20150109027A1

公开(公告)日：2015-04-23

申请号：US14582201

申请日：2014-12-24

Applicant: Novatek Microelectronics Corp.

Inventor： Tse-Hung Wu ,  Chao-Kai Tu ,  Chia-Wei Su

IPC: H03K19/0175

CPC classification number: H03K19/017509 ,  H03K17/162 ,  H03K2217/0054

Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.

Abstract translation: 数据控制电路包括输出级电路，开关电路和阻抗模块。 输出级电路输出数据信号。 开关电路的输入端子耦合到输出级电路的输出端，开关电路的输出端耦合到后级电路。 根据控制信号的控制，开关电路确定是否将输出级电路的数据信号发送到后级电路。 阻抗模块配置在输出级电路中，配置在输出级电路和开关电路之间，或配置在开关电路中。 这里，阻抗模块减少从开关电路流向输出级电路的噪声。

公开(公告)号：US20150042238A1

公开(公告)日：2015-02-12

申请号：US14028525

申请日：2013-09-16

Applicant: Novatek Microelectronics Corp.

Inventor： Yun-Chen Chuang ,  Chia-Wei Su ,  Teng-Jui Yu ,  Chu-Ya Hsiao

IPC: G09G3/00

CPC classification number: G09G3/3655 ,  G09G3/3614

Abstract: A driving method of multi-common electrodes and a display device are provided. The driving method includes following steps: providing a plurality of common voltages, in which the common voltages include a first common voltage and a second common voltage, and the first common voltage is different from the second common voltage. During a first period, the first common voltage is set to a first voltage level to drive a first common electrode of a first pixel region in the display panel, and the second common voltage is set to a third voltage level to drive a second common electrode of a second pixel region in the display panel. During a second period, the first common voltage is set to a second voltage level to drive the first common electrode, and the second common voltage is set to a fourth voltage level to drive the second common electrode.

Abstract translation: 提供了多平面电极和显示装置的驱动方法。 驱动方法包括以下步骤：提供多个公共电压，其中公共电压包括第一公共电压和第二公共电压，并且第一公共电压不同于第二公共电压。 在第一时段期间，将第一公共电压设置为第一电压电平以驱动显示面板中的第一像素区域的第一公共电极，并将第二公共电压设置为第三电压电平以驱动第二公共电极 的显示面板中的第二像素区域。 在第二时段期间，将第一公共电压设置为第二电压电平以驱动第一公共电极，并将第二公共电压设置为第四电压电平以驱动第二公共电极。

公开(公告)号：US08947408B2

公开(公告)日：2015-02-03

申请号：US13677314

申请日：2012-11-15

Applicant: Novatek Microelectronics Corp.

Inventor： Jr-Ching Lin ,  Hsin-Hung Lee ,  Chia-Wei Su ,  Po-Yu Tseng ,  Shun-Hsun Yang ,  Po-Hsiang Fang

IPC: G06F3/038 ,  G09G1/00 ,  G09G3/36

CPC classification number: G09G3/3696 ,  G09G1/005 ,  G09G3/3688 ,  G09G2320/0673

Abstract: A source driver includes a first drive channel circuit, a voltage controller and a first programmable voltage buffer unit. The first drive channel circuit receives a first pixel data from the timing controller via a data bus, converts the first pixel data to a first drive voltage according to a first reference voltage group, and drives a display panel by the first drive voltage. The voltage controller receives a voltage command from the timing controller, generates and changes a first reference voltage configuration data according to the voltage command. The first programmable voltage buffer unit is coupled to the voltage controller and the first drive channel circuit, and receives the first reference voltage configuration data to generate and adjust the first reference voltage group for applying to the first drive channel circuit. Furthermore, a method for updating a new gamma curve by the source driver is also provided.

Abstract translation: 源驱动器包括第一驱动通道电路，电压控制器和第一可编程电压缓冲器单元。 第一驱动通道电路经由数据总线从定时控制器接收第一像素数据，根据第一参考电压组将第一像素数据转换为第一驱动电压，并且通过第一驱动电压驱动显示面板。 电压控制器从定时控制器接收电压指令，根据电压指令产生并改变第一参考电压配置数据。 第一可编程电压缓冲器单元耦合到电压控制器和第一驱动通道电路，并且接收第一参考电压配置数据以产生和调整第一参考电压组以施加到第一驱动通道电路。 此外，还提供了用于由源驱动器更新新伽玛曲线的方法。

公开(公告)号：US20140368271A1

公开(公告)日：2014-12-18

申请号：US14474315

申请日：2014-09-02

Applicant: Novatek Microelectronics Corp.

Inventor： Chia-Wei Su ,  Ju-Lin Huang ,  Keko-Chun Liang

IPC: H03F3/21 ,  H03F3/45 ,  H03F3/26

CPC classification number: H03F3/211 ,  H03F1/52 ,  H03F1/523 ,  H03F3/265 ,  H03F3/303 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/444 ,  H03F2203/21178 ,  H03F2203/45218

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to an output of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract translation: 提供了具有输入放大器，输出放大器和二极管的具有过冲抑制方案的放大器电路。 输出放大器的第一和第二输入端耦合到输入放大器的输出端。 二极管耦合在输出端和输出放大器的第一输入端之间。 当输出放大器的输出端和输入端之间的电压差大于二极管的势垒电压时，二极管导通，使得输出放大器的输出端耦合到输出放大器的输入端 。 在瞬态状态下，它会快速平滑过冲信号。 在稳定状态下，二极管被切断以保持运算放大器的正常工作。

公开(公告)号：US20140320474A1

公开(公告)日：2014-10-30

申请号：US13964121

申请日：2013-08-12

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chia-Hsun Kuo ,  Chia-Wei Su ,  Ji-Ting Chen ,  Shun-Hsun Yang ,  Wei-Hsiang Hung ,  Ying-Zu Lin ,  Li-Tang Lin

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G2310/0248 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2330/021 ,  G09G2330/023

Abstract: A display driver, which comprises: a first predetermined voltage level providing apparatus, for providing a first predetermined voltage level group comprising at least one first predetermined voltage level; a first image data providing apparatus, for outputting a first image data; and a detection controlling circuit, for determining if an output terminal of the first image data providing apparatus is pre-charged to the first predetermined voltage level according to a relation between an absolute value of a voltage level of the first image data and an absolute value of the first predetermined voltage level.

Abstract translation: 一种显示驱动器，包括：第一预定电压电平提供装置，用于提供包括至少一个第一预定电压电平的第一预定电压电平组; 第一图像数据提供装置，用于输出第一图像数据; 以及检测控制电路，用于根据第一图像数据的电压电平的绝对值和绝对值之间的关系来确定第一图像数据提供装置的输出端是否被预充电到第一预定电压电平 的第一预定电压电平。

公开(公告)号：US20140160183A1

公开(公告)日：2014-06-12

申请号：US14010502

申请日：2013-08-26

Applicant: NOVATEK Microelectronics Corp.

Inventor： Shun-Hsun Yang ,  Chia-Wei Su

IPC: G09G3/36

CPC classification number: G09G3/2096

Abstract: A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.

Abstract translation: 一种对应于多个源驱动装置的定时控制装置的定时加扰方法，包括根据时钟信号调整选择信号; 根据选择信号选择多个扰频产生单元之一以产生定时加扰信号; 以及根据所述定时加扰信号产生所述多个源驱动装置的加扰数据。