-
公开(公告)号:US20240040158A1
公开(公告)日:2024-02-01
申请号:US18479663
申请日:2023-10-02
Inventor: Jing Ya LI , Han Boon TEO , Chong Soon LIM , Hai Wei SUN , Che-Wei KUO , Chu Tong WANG , Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Yusuke KATO
IPC: H04N19/82 , H04N19/107 , H04N19/176 , H04N19/186
CPC classification number: H04N19/82 , H04N19/107 , H04N19/176 , H04N19/186
Abstract: A decoder includes memory and a processor coupled to the memory and configured to: generate a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component; clip the first coefficient value such that the clipped first coefficient value is within a first range from −27 to 27−1; generate a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component; clip the second coefficient value such that the clipped second coefficient value is within a second range different from the first range; generate a third coefficient value by adding the clipped first coefficient value to the clipped second coefficient value; and generate a third reconstructed image sample of the chroma component using the third coefficient value.
-
公开(公告)号:US20230362397A1
公开(公告)日:2023-11-09
申请号:US18355164
申请日:2023-07-19
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/513
CPC classification number: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/521
Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.
-
33.
公开(公告)号:US20230171423A1
公开(公告)日:2023-06-01
申请号:US18103567
申请日:2023-01-31
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/513 , H04N19/132 , H04N19/176 , H04N19/563
CPC classification number: H04N19/513 , H04N19/132 , H04N19/176 , H04N19/563
Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
-
公开(公告)号:US20230156214A1
公开(公告)日:2023-05-18
申请号:US18067519
申请日:2022-12-16
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
-
公开(公告)号:US20230119758A1
公开(公告)日:2023-04-20
申请号:US18071370
申请日:2022-11-29
Inventor: Jing Ya LI , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Che Wei KUO , Chu Tong WANG , Kiyofumi ABE , Takahiro NISHI , Tadamasa Toma , Yusuke KATO
IPC: H04N19/117 , H04N19/105 , H04N19/119 , H04N19/82 , H04N19/13 , H04N19/18 , H04N19/186 , H04N19/124
Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y−1), (2x−1, 2y), (2x, 2y), (2x+1, 2y), (2x−1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).
-
公开(公告)号:US20230083364A1
公开(公告)日:2023-03-16
申请号:US18056542
申请日:2022-11-17
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
-
公开(公告)号:US20230075757A1
公开(公告)日:2023-03-09
申请号:US18056136
申请日:2022-11-16
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
-
公开(公告)号:US20230074281A1
公开(公告)日:2023-03-09
申请号:US17987633
申请日:2022-11-15
Inventor: Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/157 , H04N19/176
Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
-
公开(公告)号:US20220385899A1
公开(公告)日:2022-12-01
申请号:US17868199
申请日:2022-07-19
Inventor: Han Boon TEO , Hai Wei SUN , Chong Soon LIM , Jing Ya LI , Chu Tong WANG , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/117 , H04N19/80 , H04N19/105 , H04N19/46
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry: executes a second process of applying a second filter to the first image to generate a second image, not holding the second image as a reference image, holding the first image as a reference image, and displaying the second image; writes coefficients of each of one or more filter candidates that are candidates for the second filter into a bitstream, wherein the coefficients are included in a first storage location when written into the bitstream; and writes a parameter that specifies, for each image, one of the one or more filter candidates as the second filter into the bitstream, wherein the parameter is included in a second storage location when written into the bitstream, and the second storage location is different from the first storage location.
-
公开(公告)号:US20220360811A1
公开(公告)日:2022-11-10
申请号:US17864906
申请日:2022-07-14
Inventor: Jing Ya LI , Chong Soon LIM , Ru Ling LIAO , Han Boon TEO , Hai Wei SUN , Che Wei KUO , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/513 , H04N19/139 , H04N19/159 , H04N19/176
Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.
-
-
-
-
-
-
-
-
-