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公开(公告)号：US08634008B2
公开(公告)日：2014-01-21
申请号：US13463007
申请日：2012-05-03
IPC分类号： H04N5/335
CPC分类号： H04N5/3575 , H04N5/3745
摘要： Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.
摘要翻译： 提供了用于在像素的单个积分周期期间对成像像素执行多个相关双采样（CDS）操作，并且在一些情况下在成像像素阵列上执行的方法和装置。 多个CDS操作可以产生多个CDS值，其可以组合处理以产生基本上不含各种类型的噪声的结果值。 可以使用包括具有输入电容器的单端电荷放大器的CDS电路来执行CDS操作。 电荷放大器还可以包括提供可变增益的可变电容。 可变电容可由反馈电容器提供。
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公开(公告)号：US5619137A
公开(公告)日：1997-04-08
申请号：US600380
申请日：1996-02-12
申请人： Ravi Vig , Teri Tu , Paul W. Latham, II
发明人： Ravi Vig , Teri Tu , Paul W. Latham, II
IPC分类号： G01R33/07 , H03K3/0233 , G01R33/06 , G01R33/025 , H03K3/38
CPC分类号： G01R33/07 , H03K3/02337
摘要： A low power magnetic-field detector, of the kind for detecting an ambient magnetic field that is greater than a predetermined field strength, is comprised of a Hail element, a transducer-voltage amplifier, and a zero-crossing comparator, all connected in tandem. A clock and switch are used to chop the energizing current to the Hall element. Alternatively, the amplifier and comparator are also chopped to further reduce power consumption. A clockable flip flop is synchronously enabled for an instant at the end of each period of energizing the Hall element. The comparator output signal is transferred to the flip flop Q output and held there during each period of not energizing the Hall element. A Positive-feedback hysteresis circuit adds a bias voltage to the amplified Hall voltage and is applied to the comparator input to effect comparator hysteresis with memory covering clock-period portions when the Hall element is not energized. The comparator is thus transformed into a Schmitt trigger circuit having hysteresis memory, making it possible to chop the Hall element to substantially reduce the detector power consumption without loosing the hysteresis feature.
摘要翻译： 用于检测大于预定场强的环境磁场的低功率磁场检测器由Hail元件，传感器电压放大器和过零比较器组成，全部以串联方式连接 。 时钟和开关用于将激励电流切断到霍尔元件。 或者，放大器和比较器也被切碎以进一步降低功耗。 时钟触发器在霍尔元件通电的每个周期结束时立即同时使能。 比较器输出信号被传送到触发器Q输出并且在不给霍尔元件通电的每个周期期间保持在其中。 正反馈迟滞电路向放大的霍尔电压增加偏置电压，并将其施加到比较器输入，以在霍尔元件未通电时覆盖时钟周期部分的存储器来实现比较器滞后。 因此，比较器被转换成具有滞后存储器的施密特触发电路，使得可以将霍尔元件切断以显着降低检测器的功耗，而不会失去滞后特性。
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公开(公告)号：US5278478A
公开(公告)日：1994-01-11
申请号：US912383
申请日：1992-07-13
CPC分类号： G05B11/42
摘要： A programmable PD servo compensator has the transfer function of the combination of a standard PD compensator in tandem with a second order low pass filter. The programmable PD servo compensator consists simply of a biquad filter having a single complex zero and a pair of conjugate complex poles. This servo compensator is comprised of two tandem connected operational amplifiers, each with a capacitor connected output to input across it. The tandem connection is effected by one switched-capacitor resistor between the output of the first amplifier to the input of the second. Another switched-capacitor resistor is connected between the PD compensator input and the input of the first amplifier. Yet another switched capacitor is connected between the PD compensator output and the input of the first amplifier. Additionally, a poles Q-programming circuit branch includes a digitally-programmable capacitor array, and a zero programming circuit branch includes another digitally-programmable capacitor array connected in the filter for determining the S-plane position of the zero and determining the relative gains of the proportional and derivative components of the PD compensator output signal. This is therefore an analog-signal handling servo compensator with digital programmability and having high speed, stability and versatility.
摘要翻译： 可编程PD伺服补偿器具有与二阶低通滤波器串联的标准PD补偿器的组合的传递函数。 可编程PD伺服补偿器仅由具有单个复零点和一对共轭复极的双二阶滤波器组成。 该伺服补偿器由两个串联连接的运算放大器组成，每个运算放大器的电容连接到输入端。 串联连接由第一放大器的输出端与第二放大器的输入端之间的一个开关电容电阻器实现。 另一个开关电容电阻连接在PD补偿器输入和第一放大器的输入端之间。 另一个开关电容器连接在PD补偿器输出和第一放大器的输入端之间。 此外，极点Q编程电路分支包括数字可编程电容器阵列，零编程电路分支包括连接在滤波器中的另一数字可编程电容器阵列，用于确定零的S平面位置，并确定零的相对增益 PD补偿器输出信号的比例和微分分量。 因此，这是具有数字可编程性并具有高速度，稳定性和通用性的模拟信号处理伺服补偿器。
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公开(公告)号：US20120217376A1
公开(公告)日：2012-08-30
申请号：US13463007
申请日：2012-05-03
IPC分类号： H01L27/146 , H01L31/00
CPC分类号： H04N5/3575 , H04N5/3745
摘要： Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.
摘要翻译： 提供了用于在像素的单个积分周期期间对成像像素执行多个相关双采样（CDS）操作，并且在一些情况下在成像像素阵列上执行的方法和装置。 多个CDS操作可以产生多个CDS值，其可以组合处理以产生基本上不含各种类型的噪声的结果值。 可以使用包括具有输入电容器的单端电荷放大器的CDS电路来执行CDS操作。 电荷放大器还可以包括提供可变增益的可变电容。 可变电容可由反馈电容器提供。
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公开(公告)号：US08072525B1
公开(公告)日：2011-12-06
申请号：US12141542
申请日：2008-06-18
IPC分类号： H04N5/335
CPC分类号： H04N5/3575 , H04N5/3745
摘要： Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.
摘要翻译： 提供了用于在像素的单个积分周期期间对成像像素执行多个相关双采样（CDS）操作，并且在一些情况下在成像像素阵列上执行的方法和装置。 多个CDS操作可以产生多个CDS值，其可以组合处理以产生基本上不含各种类型的噪声的结果值。 可以使用包括具有输入电容器的单端电荷放大器的CDS电路来执行CDS操作。 电荷放大器还可以包括提供可变增益的可变电容。 可变电容可由反馈电容器提供。
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公开(公告)号：US06775164B2
公开(公告)日：2004-08-10
申请号：US10099661
申请日：2002-03-14
申请人： Chuck Wong , Paul W. Latham, II , Shawn Laliberte
发明人： Chuck Wong , Paul W. Latham, II , Shawn Laliberte
IPC分类号： H02M100
摘要： A three-terminal low-voltage PWM controller chip includes a first terminal for receiving operating bias current supply and a feedback control signal related to an output parameter of an electrical circuit to be controlled; a second terminal connected to an output switch providing digital width-modulated control pulses to control duty cycle of the electrical circuit; a third terminal ground connection; a clocked pulse width modulation circuit responsive to current flow between the second terminal and the third terminal and the feedback control value for controlling the digital output switch; and, feedback signal separation circuitry for separating the feedback control signal from the operating bias current supply. A start-up circuit is also provided.
摘要翻译： 三端低电压PWM控制器芯片包括用于接收工作偏置电流源的第一端子和与要控制的电路的输出参数相关的反馈控制信号; 连接到输出开关的第二端子，提供数字宽度调制的控制脉冲以控制电路的占空比; 第三端接地连接; 响应于第二端子和第三端子之间的电流的时钟脉冲宽度调制电路和用于控制数字输出开关的反馈控制值; 以及用于将反馈控制信号与工作偏置电流源分离的反馈信号分离电路。 还提供启动电路。
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公开(公告)号：US5245262A
公开(公告)日：1993-09-14
申请号：US912387
申请日：1992-07-13
IPC分类号： G05B11/42 , G05B19/414
CPC分类号： G05B19/4142 , G05B11/42
摘要： A digitally programmable integrated-circuit analog-signal servo co-processor has digital programming contact pads to which an external microprocessor may be connected, has analog-signal input pads and analog-signal output pads, and includes a plurality of programmable analog-signal-manipulating circuits (ASMC's). Each of the ASMC's has input and output terminals connected to an input programmable-switch matrix so that one or a combination of the ASMC blocks may be connected between the analog-signal input and output contact pads of the integrated circuit. Certain ASMC blocks have microprocessor programmable transfer functions, e.g. ASMC integrator, notch filter, low pass filter, PD compensator and voltage divider. Key ones of those ASMC blocks are discrete-time circuits including switched-capacitor resistors and have transfer functions wherein the parameters are ratios of capacitances and the switching rate frequency to provide accurate and stable performance. This versatile system of digitally programmable circuit configurations and digitally programmable analog (ASMC) transfer functions provides a hybrid analog and digital servo co-processor having high speed, versatility and stability and a low power consumption.
摘要翻译： 数字可编程集成电路模拟信号伺服协处理器具有可连接外部微处理器的数字编程接触焊盘，具有模拟信号输入焊盘和模拟信号输出焊盘，并且包括多个可编程模拟信号 - 操纵电路（ASMC）。 ASMC中的每一个具有连接到输入可编程开关矩阵的输入和输出端子，使得ASMC块中的一个或其组合可以连接在集成电路的模拟信号输入和输出接触焊盘之间。 某些ASMC模块具有微处理器可编程传输功能，例如 ASMC积分器，陷波滤波器，低通滤波器，PD补偿器和分压器。 这些ASMC块中的关键是离散时间电路，包括开关电容电阻，并具有传递函数，其中参数是电容比率和开关速率频率，以提供准确和稳定的性能。 这种数字可编程电路配置和数字可编程模拟（ASMC）传输功能的多功能系统提供了具有高速度，多功能性和稳定性以及低功耗的混合模拟和数字伺服协处理器。
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38.依法登记的发明Transversal filter used as an equalizer for data readout from a disk drive 失效横向滤波器用作用于从磁盘驱动器读取数据的均衡器
公开(公告)号：USH588H
公开(公告)日：1989-02-07
申请号：US108512
申请日：1987-10-13
申请人： Paul W. Latham, II
发明人： Paul W. Latham, II
摘要： A disk drive employs transversal filters as equalizers for each of its read heads, permitting adaptive equalization of read head signals, optimized for each track position.
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39.发明授权公开(公告)号：US08629663B2
公开(公告)日：2014-01-14
申请号：US13078283
申请日：2011-04-01
IPC分类号： G05F1/577
CPC分类号： H02M3/158 , H02M3/07 , H02M2001/0006 , H02M2001/009
摘要： A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.
摘要翻译： 用于电源的第一控制系统包括开关模式DC-DC转换器模块和FET栅极驱动模块。 开关模式DC-DC转换器模块接收输入电压并产生第一和第二电压，第一电压为DC-DC控制模块供电。 FET栅极驱动模块使用第二电压选择性地驱动电源的多个FET，从而从输入电压产生期望的输出电压。 第二控制系统旨在将第二电压驱动到期望的栅极电压，其中期望栅极电压基于多个操作参数中的至少一个来确定。 第三控制系统包括基于第一和第二电压和阻尼因子来控制由SIDO电压转换器产生的第一和第二电压，并且基于流过SIDO电压转换器的电感器的电流产生阻尼因子。
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40.发明申请SYSTEMS AND METHODS FOR INTEGRATED SWITCH-MODE DC-DC CONVERTERS FOR POWER SUPPLIES 有权用于电源的集成开关式DC-DC转换器的系统和方法公开(公告)号：US20120249103A1
公开(公告)日：2012-10-04
申请号：US13078283
申请日：2011-04-01
IPC分类号： G05F1/46
CPC分类号： H02M3/158 , H02M3/07 , H02M2001/0006 , H02M2001/009
摘要： A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.
摘要翻译： 用于电源的第一控制系统包括开关模式DC-DC转换器模块和FET栅极驱动模块。 开关模式DC-DC转换器模块接收输入电压并产生第一和第二电压，第一电压为DC-DC控制模块供电。 FET栅极驱动模块使用第二电压选择性地驱动电源的多个FET，从而从输入电压产生期望的输出电压。 第二控制系统旨在将第二电压驱动到期望的栅极电压，其中期望栅极电压基于多个操作参数中的至少一个来确定。 第三控制系统包括基于第一和第二电压和阻尼因子来控制由SIDO电压转换器产生的第一和第二电压，并且基于流过SIDO电压转换器的电感器的电流产生阻尼因子。
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