利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

26 条记录 (耗时 0.019 秒)

    Methods of operating an imaging pixel to accumulate charge from a photocurrent
    1.
    发明授权
    Methods of operating an imaging pixel to accumulate charge from a photocurrent 有权
    操作成像像素以从光电流累积电荷的方法

    公开(公告)号：US08586907B2

    公开(公告)日：2013-11-19

    申请号：US13212271

    申请日：2011-08-18

    申请人： Bryan D. Ackland

    发明人： Bryan D. Ackland

    IPC分类号： H03K17/78 ,  H01L27/00

    CPC分类号： H04N5/3742 ,  H04N5/3559 ,  H04N5/3745

    摘要： An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.

    摘要翻译： 具有模拟和数字读数组合的改进的CMOS像素，以提供大的像素动态范围，而不会在使用比较器的低亮度性能的情况下以一系列指数增长的曝光时间来测试累积电荷的值。 一旦累积的模拟电压达到预定阈值，该测试用于停止光电流的积分。 在每个指数增长的曝光周期中，从像素（数字地）读出测试的一位输出值。 在积分周期结束时，使用常规CMOS有源像素读出电路读出存储在积分电容器上的模拟值。

    Methods and apparatus for increasing metal density in an integrated circuit while also reducing parasitic capacitance
    2.
    发明授权
    Methods and apparatus for increasing metal density in an integrated circuit while also reducing parasitic capacitance 失效
    增加集成电路中金属密度的方法和装置，同时也降低寄生电容

    公开(公告)号：US6097195A

    公开(公告)日：2000-08-01

    申请号：US88852

    申请日：1998-06-02

    申请人： Bryan D. Ackland ,  David A. Inglis ,  Gregory P. Kochanski

    发明人： Bryan D. Ackland ,  David A. Inglis ,  Gregory P. Kochanski

    IPC分类号： H01L23/522 ,  G01R31/26

    CPC分类号： H01L23/5225 ,  H01L2924/0002

    摘要： A shield region of metallization is formed in a first metallization layer of an integrated circuit so as to increase the metal density of the first metallization layer to at least a minimum density required for proper fabrication. The shield region is coupled via an amplifier or other suitable coupling mechanism to at least a portion of another metallization layer overlying or underlying the first metallization layer in the integrated circuit, such that the shield region acts to reduce parasitic capacitance associated with a circuit node in the other metallization layer. In an illustrative fingerprint sensor cell implementation, the shield region is in the form of a shield plate underlying a sensor plate in the sensor cell and serves to increase the metal density of a lower-level metallization layer in the cell. The sensor plate is coupled to the shield plate via a unity-gain amplifier, so as to reduce the parasitic capacitance seen by the sensor plate, thereby improving the ability of the sensor cell to detect fingerprint characteristics. The invention can provide similar advantages in numerous other integrated circuit applications.

    摘要翻译： 在集成电路的第一金属化层中形成金属化的屏蔽区域，以便将第一金属化层的金属密度增加到适当制造所需的至少最小密度。 屏蔽区域经由放大器或其它合适的耦合机构耦合到叠加在集成电路中的第一金属化层上或下方的另一金属化层的至少一部分，使得屏蔽区域用于减小与电路节点相关的寄生电容 另一个金属化层。 在说明性指纹传感器单元实现中，屏蔽区域处于传感器单元内的传感器板下方的屏蔽板的形式，并用于增加电池中较低级金属化层的金属密度。 传感器板通过单位增益放大器耦合到屏蔽板，以便减小传感器板所看到的寄生电容，从而提高传感器单元检测指纹特性的能力。 本发明可以在许多其他集成电路应用中提供类似的优点。

    Single-polysilicon CMOS active pixel
    3.
    发明授权
    Single-polysilicon CMOS active pixel 失效
    单晶硅CMOS有源像素

    公开(公告)号：US5576763A

    公开(公告)日：1996-11-19

    申请号：US344785

    申请日：1994-11-22

    申请人： Bryan D. Ackland ,  Alexander G. Dickinson ,  El-Sayed I. Eid ,  David A. Inglis

    发明人： Bryan D. Ackland ,  Alexander G. Dickinson ,  El-Sayed I. Eid ,  David A. Inglis

    IPC分类号： H01L27/092 ,  H01L21/8238 ,  H01L27/146 ,  H01L31/113 ,  H04N5/335

    CPC分类号： H01L27/14609 ,  H01L27/14643 ,  H01L31/1136

    摘要： The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry are required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.

    摘要翻译： 单个多晶硅有源像素包括位于衬底上的用于产生和存储电荷载流子的光电子位点，电荷载体由入射到光电位置和半导体衬底上的光能产生，光栅，传输晶体管以及输出和复位电子 。 传输晶体管的栅极和光栅限定在设置在半导体衬底上的单层多晶硅中。 传输晶体管的源是衬底的掺杂区域，被称为耦合扩散，其提供光栅和转移晶体管之间的电耦合。 耦合扩散允许将存储在光栅下的照片位置的信号传送到输出电子器件用于处理。 可以通过将传输晶体管偏置到像素的低工作电压（例如0伏）来操作单多晶硅有源像素。 由于单个多晶硅有源像素的结构，这种操作模式产生与传输晶体管时钟相同的定时，但是不需要时钟和相关的驱动电路。 然而，当双重多晶硅有源像素以避免传输门时钟的方式操作时，几乎没有发生图像滞后的趋势。

    IMAGING SIGNAL PROCESSING METHODS AND APPARATUS
    4.
    发明申请
    IMAGING SIGNAL PROCESSING METHODS AND APPARATUS 有权
    成像信号处理方法和设备

    公开(公告)号：US20120217376A1

    公开(公告)日：2012-08-30

    申请号：US13463007

    申请日：2012-05-03

    申请人： BRYAN D. ACKLAND ,  Paul W. Latham, II ,  Joshua C. Park

    发明人： BRYAN D. ACKLAND ,  Paul W. Latham, II ,  Joshua C. Park

    IPC分类号： H01L27/146 ,  H01L31/00

    CPC分类号： H04N5/3575 ,  H04N5/3745

    摘要： Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.

    摘要翻译： 提供了用于在像素的单个积分周期期间对成像像素执行多个相关双采样（CDS）操作，并且在一些情况下在成像像素阵列上执行的方法和装置。 多个CDS操作可以产生多个CDS值，其可以组合处理以产生基本上不含各种类型的噪声的结果值。 可以使用包括具有输入电容器的单端电荷放大器的CDS电路来执行CDS操作。 电荷放大器还可以包括提供可变增益的可变电容。 可变电容可由反馈电容器提供。

    Imaging signal processing methods and apparatus
    5.
    发明授权
    Imaging signal processing methods and apparatus 有权
    成像信号处理方法和装置

    公开(公告)号：US08072525B1

    公开(公告)日：2011-12-06

    申请号：US12141542

    申请日：2008-06-18

    申请人： Bryan D. Ackland ,  Paul W. Latham, II ,  Joshua C. Park

    发明人： Bryan D. Ackland ,  Paul W. Latham, II ,  Joshua C. Park

    IPC分类号： H04N5/335

    CPC分类号： H04N5/3575 ,  H04N5/3745

    摘要： Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.

    摘要翻译： 提供了用于在像素的单个积分周期期间对成像像素执行多个相关双采样（CDS）操作，并且在一些情况下在成像像素阵列上执行的方法和装置。 多个CDS操作可以产生多个CDS值，其可以组合处理以产生基本上不含各种类型的噪声的结果值。 可以使用包括具有输入电容器的单端电荷放大器的CDS电路来执行CDS操作。 电荷放大器还可以包括提供可变增益的可变电容。 可变电容可由反馈电容器提供。

    METHODS AND APPARATUS FOR IMAGING SYSTEMS
    6.
    发明申请
    METHODS AND APPARATUS FOR IMAGING SYSTEMS 有权
    成像系统的方法和装置

    公开(公告)号：US20110074995A1

    公开(公告)日：2011-03-31

    申请号：US12570679

    申请日：2009-09-30

    申请人： Conor S. Rafferty ,  Clifford A. King ,  Michael Philip Decelle ,  Jason Y. Sproul ,  Bryan D. Ackland

    发明人： Conor S. Rafferty ,  Clifford A. King ,  Michael Philip Decelle ,  Jason Y. Sproul ,  Bryan D. Ackland

    IPC分类号： H04N5/335

    CPC分类号： H04N5/35563

    摘要： Imaging arrays comprising at least two different imaging pixel types are described. The different imaging pixel types may differ in their light sensitivities and/or light saturation levels. Methods of processing the output signals of the imaging arrays are also described, and may produce images having a greater dynamic range than would result from an imaging array comprising only one of the at least two different imaging pixel types.

    摘要翻译： 描述包括至少两个不同成像像素类型的成像阵列。 不同的成像像素类型在其光敏度和/或光饱和度方面可能不同。 还描述了处理成像阵列的输出信号的方法，并且可以产生具有比由仅包括至少两种不同成像像素类型中的一种的成像阵列产生的动态范围更大的图像。

    Pulse detector which employs a self-resetting pulse amplifier
    7.
    发明授权
    Pulse detector which employs a self-resetting pulse amplifier 失效
    采用自复位脉冲放大器的脉冲检测器

    公开(公告)号：US07528357B2

    公开(公告)日：2009-05-05

    申请号：US11407376

    申请日：2006-04-19

    申请人： Behzad Razavi ,  Lawrence C. West ,  Bryan D. Ackland

    发明人： Behzad Razavi ,  Lawrence C. West ,  Bryan D. Ackland

    IPC分类号： H03G3/20

    CPC分类号： H01L27/144 ,  H03F3/08 ,  H03K5/1534 ,  H04B10/66

    摘要： A circuit including: an optical detector for detecting an optical pulse and generating therefrom a current pulse on an output; a pulse detector circuit having an input electrically connected to the optical detector and having an output for outputting a detection pulse in response to detecting the current pulse on its input, said pulse detector circuit including: a resettable amplifier including an input for receiving the current pulse from the optical detector, a reset terminal for resetting the amplifier after the amplifier detects the current pulse on its input, and an output for outputting a signal from which the detection pulse is derived; and a reset delay chain feeding back to the reset terminal of the resettable amplifier a feedback signal derived from the output signal of the resettable amplifier.

    摘要翻译： 一种电路，包括：光检测器，用于检测光脉冲并产生输出上的电流脉冲; 脉冲检测器电路，其具有电连接到所述光学检测器的输入端，并具有用于响应于检测其输入上的电流脉冲而输出检测脉冲的输出，所述脉冲检测器电路包括：可复位放大器，包括用于接收电流脉冲的输入 来自光检测器的复位端子，用于在放大器检测到其输入上的电流脉冲之后复位放大器，以及用于输出用于输出检测脉冲的信号的输出; 以及复位延迟链，其将可重置放大器的输出信号导出的反馈信号反馈到可复位放大器的复位端。

    Static random access memory sense amplifier
    8.
    发明授权
    Static random access memory sense amplifier 失效
    静态随机存取存储器读出放大器

    公开(公告)号：US5604705A

    公开(公告)日：1997-02-18

    申请号：US518055

    申请日：1995-08-22

    申请人： Bryan D. Ackland ,  Jay H. O'Neill

    发明人： Bryan D. Ackland ,  Jay H. O'Neill

    IPC分类号： G11C11/409 ,  G11C11/419 ,  G11C7/06

    CPC分类号： G11C11/419

    摘要： A memory sense amplifier for a static random access memory includes a pair of transistor amplifiers respective to the bit lines threading the memory. The power consumed is minimized without sacrificing speed of operation by temporarily connecting the source electrodes of the transistor amplifiers to the bit lines to allow them to track the states of the bit lines before a current path is completed to the drains of the transistors to allow them to draw current from the bit lines, thereby minimizing the time that the sense amplifiers are permitted to draw current from the bit lines. In addition, an economy of circuitry is achieved by eliminating the need for a separate latch circuit by disconnecting the sense amplifiers from the bit lines and thereafter enabling them to latch the information state read from the bit lines. The memory cycle is defined in four distinct phases ("PRECHARGE", "SENSE", "SELECT", and "HOLD"), instead of in two phases ("clock" and "select") followed by indeterminate length self-timed intervals as provided in prior art U.S. Pat. No. 5,309,395.

    摘要翻译： 用于静态随机存取存储器的存储读出放大器包括对应于穿过存储器的位线的一对晶体管放大器。 通过将晶体管放大器的源电极临时连接到位线，使消耗的功率最小化而不牺牲操作速度，以允许它们在电流路径完成之前跟踪晶体管的漏极以允许它们跟踪位线的状态，以允许它们 以从位线中抽出电流，从而最小化允许读出放大器从位线抽取电流的时间。 此外，通过将读出放大器与位线断开来消除对单独的锁存电路的需要，从而使它们能够锁存从位线读出的信息状态来实现电路的经济性。 存储周期在四个不同的阶段（“PRECHARGE”，“SENSE”，“SELECT”和“HOLD”）中定义，而不是两个阶段（“clock”和“select”），后面是不确定的长度自定时间 如现有技术的US Pat。 第5,309,395号。