STAGGERED ROWS OF ANTENNAS FOR DUAL FREQUENCY OPERATION

    公开(公告)号:US20220344833A1

    公开(公告)日:2022-10-27

    申请号:US17656721

    申请日:2022-03-28

    摘要: Apparatus and methods for antenna arrays with staggered rows of antennas for dual frequency operation are provided. In certain embodiments, a mobile device includes a front-end system including a plurality of radio frequency signal conditioning circuits, an antenna array that includes a plurality of antenna elements including a first row of antenna elements and a second row of antenna elements that are staggered, a plurality of switches coupled between the plurality of radio frequency signal conditioning circuits and the antenna array, and a control circuit configured to control a selection of the plurality of antenna elements by the plurality of switches.

    Accidental fuse programming protection circuit

    公开(公告)号:US11444026B2

    公开(公告)日:2022-09-13

    申请号:US16861028

    申请日:2020-04-28

    摘要: Circuits, methods, and devices for protecting against accidental fuse programming are discussed herein. For example, a fuse circuit may include a first switch electrically connected to a first point, a fuse electrically connected in series with the first switch, a first biasing circuit to control the first switch to enable programming of the fuse in response to a fuse programming event, a second switch electrically connected in series with the fuse between the fuse and a second point, and a second biasing circuit to control the second switch to enable programming of the fuse in response to the fuse programming event.

    OPTIMIZED GATE AND/OR BODY BIAS NETWORK OF A RF SWITCH FET

    公开(公告)号:US20210203322A1

    公开(公告)日:2021-07-01

    申请号:US17122166

    申请日:2020-12-15

    IPC分类号: H03K17/687 H03K17/06

    摘要: A radio frequency signal switch assembly including a signal input and a signal output, a first control input configured to receive a control signal, a first switch including a first plurality of transistors coupled between the signal input and the signal output, each transistor of the first plurality of transistors having a gate, a drain, and a source, a first common resistor coupled between the first control input and the gate of one transistor of the first plurality of transistors, and a first plurality of gate resistors coupled between the gates of the first plurality of transistors, each gate resistor being coupled between the gates of two adjacent transistors.

    Circuits, devices, and methods for operating a charge pump

    公开(公告)号:US10447151B2

    公开(公告)日:2019-10-15

    申请号:US14928052

    申请日:2015-10-30

    IPC分类号: G05F1/10 G05F3/02 H02M3/07

    摘要: Circuits, devices, and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.

    ACCIDENTAL FUSE PROGRAMMING PROTECTION CIRCUITS

    公开(公告)号:US20190180833A1

    公开(公告)日:2019-06-13

    申请号:US16280489

    申请日:2019-02-20

    摘要: Apparatus and methods for protection against inadvertent programming of fuse cells are provided herein. In certain configurations, a packaged radio frequency module includes a package substrate and a semiconductor die attached to the packaged substrate. The semiconductor die includes a power supply pad, a fuse, a fuse programming transistor having a source electrically connected to the power supply pad and a gate configured to receive a fuse programming signal, a cascode transistor electrically connected between a drain of the fuse programming transistor and the fuse, and a fuse protection capacitor electrically connected between the power supply pad and a gate of the cascode transistor and operable to inhibit unintended programming of the fuse.

    Linearity in radio-frequency devices using body impedance control

    公开(公告)号:US10284200B2

    公开(公告)日:2019-05-07

    申请号:US16043014

    申请日:2018-07-23

    IPC分类号: H03K19/00 H03K17/693

    摘要: A process for fabricating a semiconductor die involves providing a semiconductor substrate, forming a first field-effect transistor on the semiconductor substrate, the first field-effect transistor having a source, a drain, a gate, and a body, forming a coupling path that couples the body of the first field-effect transistor to the gate of the first field-effect transistor, the coupling path including a diode, and forming an adjustable impedance network coupled between the body of the first field-effect transistor and a ground reference, the adjustable impedance network being configured to reduce radio-frequency distortion in the first field-effect transistor.

    DYNAMIC FUSE SENSING AND LATCH CIRCUIT
    38.
    发明申请

    公开(公告)号:US20180336955A1

    公开(公告)日:2018-11-22

    申请号:US15984666

    申请日:2018-05-21

    IPC分类号: G11C17/18 G11C17/16

    CPC分类号: G11C17/18 G11C17/165

    摘要: Systems and methods are directed to an integrated circuit to sense a state of a fuse having one of a blown state and an unblown state. The integrated circuit includes a fuse sensing circuit having an input and a plurality of outputs, the input being configured to receive a sense signal having a first state and a second state, and the plurality of outputs including a first output to connect to a first contact of the fuse, a second output to provide a first signal indicative of the state of the fuse, and a third output to provide a second signal indicative of the state of the fuse, the fuse sensing circuit being configured to provide the first and second signals responsive to a change in state of the sense signal, and a latch circuit having a first input to receive the first signal, a second input to receive the second signal, and an output to provide an output signal indicative of the state of the fuse, the latch circuit being configured to store and maintain a value of the output signal.